Soft materials (rubber) enable large deformations, creating new opportunities for devices that transform their shape on demand. We are developing methods to control arrays of actuators in a scalable way. These actuator arrays could have future applications in virtual reality devices, miniaturized tunable optics, and devices that control sound waves on demand.
This is a collaborative project that can include work on several topics including machine learning algorithms, programming microcontrollers, designing control electronics, and fabricating robotic devices.

Fabrication and Robotics, Material Processing and Characterization, Microelectronics

• No Major Restriction

No previous training is necessary, but experience with CAD, polymer processing, and simple control electronics (Arduino, NI DAQ) is an asset.

Mechanical Engineering

Alex Chortos

In the coming years, countries around the world will make concerted efforts to decarbonize various industries and technologies to help prevent and reverse climate change. Currently, thermal dehydration accounts for 10-20% of all industrial energy consumption and relies heavily on the combustion of fossil fuels. Vapor compression heat pumps, like those used in building air conditioners, offer a high-efficiency, electrically driven heat source for industrial drying applications, however there are many barriers preventing broad implementation. Our team at Purdue has proposed a new thermal drying system concept that employs unique materials and exploits clever thermodynamic design to provide up to 40% energy and emissions savings. As part of this work, we are developing system models/simulations, designing and building prototype systems, and performing advanced materials research, thus providing a breadth of exciting opportunities for aspiring scientists and engineers. This research is also heavily tied to our work on energy efficient thermal systems for buildings and water/energy sustainability, and the student who joins the project will be exposed to many research topics within the Water-Energy Nexus.

Composite Materials and Alloys, Energy and Environment, Engineering the Built Environment, Fluid Modelling and Simulation, Material Modeling and Simulation, Material Processing and Characterization, Microelectronics, Nanotechnology, Thermal Technology

• No Major Restriction

Applicants should have a general interest in energy and sustainability. Should also have a strong background/interest in thermodynamics, heat transfer, and/or materials science. Applicants with experience in some (not all) of the following are preferred: LabVIEW, Python (Jupyter, Google Colab, etc.) Engineering Equation Solver, MATLAB, 3D-CAD Software, prototype design/manufacturing, and Adobe Illustrator. 2nd semester Sophomores, Juniors, and 1st semester Seniors are preferred.

Mechanical Engineering

Jim Braun

In 2017, a large-scale, 3D integrated quantum processor was demonstrated by MIT Lincoln Laboratory using heterogeneous 3D integration to create an architecture that enables the use of the third dimension without sacrificing qubit performance [D. Rosenberg, et al., Nature 2017]. In these quantum applications, conventional Sn-based solder bumps are not reliable while Indium and bismuth-based solders are promising for 3D integration at low temperatures. In this topic, new cryogenic compatible packaging materials and cryogenic superconducting multi-chip bonding techniques are needed to further explore and investigate the microelectronics devices and packages at low/cryogenic temperatures.

Reference: Rosenberg, D., et al. "3D integrated superconducting qubits." npj quantum information 3.1 (2017): 1-5.)

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation

Advanced Packaging, Microelectronics

• No Major Restriction

ME

Tiwei Wei

Interposer is one of the most potential solutions for future 3D integration with ultrafine pitch. Silicon interposer has been developed in both industry and academia. However, silicon interposer has limitations, such as low productivity due to limited wafer size, extra expensive semiconductor fabrication processes, and poor electrical properties like insert loss and signal crosstalk. On the contrary, glass can be one kind of promising material as an interposer because of its excellent properties, such as good electrical resistivity, relatively low CTE compared to organic material, and possible high productivity with big panel sizes provided by glass suppliers.

Recent research studies have mainly focused on three challenges in glass interposer technology: (1) formation of the fine pitch via, which is more difficult than through silicon via (TSV) due to the unfavorable etching process ; (2) via metallization and via filling process, which become much more complicated because of the rough morphology of TGV surface, and difficulty to fill the tapered via through Damascus electroplating; (3) reliability concern, which is caused by brittleness and poor mechanical strength of glass.

Through glass via fabrications
Reference: Wei, T. W., Cai J.*, et al. Performance and reliability study of TGV interposer in 3D integration[C]//2014 IEEE 16th Electronics Packaging Technology Conference (EPTC). IEEE, 2014: pp. 601-605.

Advanced Packaging, Microelectronics

• No Major Restriction

ME

Tiwei Wei

Discovering (a) novel scalable quantum platforms and (b) low-dissipation, compact, and high-frequency microelectronics systems are widely believed to be one of the central grand challenges faced by our society to fulfill the need for creating information processing, memory, and communication technologies of the future (next-generation micro-electronics). Crucially, along with the advancement in theory and synthesis, the success of these efforts relies on the development of sensitive probes that can couple efficiently with this broad class of systems to gain a fundamental understanding of the phenomena of interest. However, this endeavor is proving challenging for present-day probes. This is because, in the regime of interest, the underlying signals that need detection are typically weak and/or vary at small (nanoscale) spatial and high frequency (GHz) temporal scales. Recently, a new class of probes, dubbed quantum probes, has emerged to solve this challenge. Such quantum probes take advantage of the Achilles heel of quantum systems – their strong sensitivity to the environment. Several well-established quantum sensing protocols have been developed which can sense signals with sensitivities and/or resolution beyond those offered by classical sensors. This has opened doors to use these novel quantum metrology tools for probing next-generation microelectronics systems in regimes that were previously not possible, and thus aid in their advancement.

This project focuses on the development and application of one such quantum metrology tool—optically active spin qubit (e.g. Nitrogen-Vacancy center in diamond). In particular, it aims to realize the basic working principle and design of a spin-qubit-based quantum system to enable multiple lengths (from chip-scale widefield geometry to nanoscale) and ultrafast time-scale (10’s GHz) probing of new-era microelectronic systems by measuring the stray magnetic fields and/or temperature profile they generate. As one specific example of an application area, we will apply the developed capability to probe for the first-time low frequency noise of spintronic materials. The scope of this project includes the design and augmentation of existing setup (e.g. to widefield geometry), benchmarking of the developed capability via testing performed on known signals, and design of sensing protocols along with the demonstration of beyond state-of-the-art metrology of spintronic materials (via multi-physics modeling in conjunction with experiments).

Microelectronics

• No Major Restriction
• Physics
• Electrical Engineering

ECE

Pramey Upadhyaya

This project is one of several SCALE SURF research projects. SCALE projects are restricted to students who are U.S. Citizens. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

In 2017, a large-scale, 3D integrated quantum processor was demonstrated by MIT Lincoln Laboratory using heterogeneous 3D integration to create an architecture that enables the use of the third dimension without sacrificing qubit performance [D. Rosenberg, et al., Nature 2017]. In these quantum applications, conventional Sn-based solder bumps are not reliable while Indium and bismuth-based solders are promising for 3D integration at low temperatures. In this topic, new cryogenic compatible packaging materials and cryogenic superconducting multi-chip bonding techniques are needed to further explore and investigate the microelectronics devices and packages at low/cryogenic temperatures.

Reference: Rosenberg, D., et al. "3D integrated superconducting qubits." npj quantum information 3.1 (2017): 1-5.)

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Advanced Packaging, Heterogeneous Integration, Material Processing and Characterization, Microelectronics, Nanotechnology, System-on-a-Chip

• Electrical Engineering
• Materials Engineering
• Mechanical Engineering

1. Microelectronics, micro/nanotechnology courses 2. Clean room fabrication experience 3. Enthusiasm for material fabrication and characterizations 4. Familiar with SEM, TEM analysis

ME

Tiwei Wei

This project is one of several SCALE SURF research projects. SCALE projects are restricted to students who are U.S. Citizens. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

Interposer is one of the most potential solutions for future 3D integration with ultrafine pitch. Silicon interposer has been developed in both industry and academia. However, silicon interposer has limitations, such as low productivity due to limited wafer size, extra expensive semiconductor fabrication processes, and poor electrical properties like insert loss and signal crosstalk. On the contrary, glass can be one kind of promising material as an interposer because of its excellent properties, such as good electrical resistivity, relatively low CTE compared to organic material, and possible high productivity with big panel sizes provided by glass suppliers.

Recent research studies have mainly focused on three challenges in glass interposer technology: (1) formation of the fine pitch via, which is more difficult than through silicon via (TSV) due to the unfavorable etching process ; (2) via metallization and via filling process, which become much more complicated because of the rough morphology of TGV surface, and difficulty to fill the tapered via through Damascus electroplating; (3) reliability concern, which is caused by brittleness and poor mechanical strength of glass.

Through glass via fabrications
Reference: Wei, T. W., Cai J.*, et al. Performance and reliability study of TGV interposer in 3D integration[C]//2014 IEEE 16th Electronics Packaging Technology Conference (EPTC). IEEE, 2014: pp. 601-605.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Advanced Packaging, Heterogeneous Integration, Material Modeling and Simulation, Material Processing and Characterization, Microelectronics, Nanotechnology, System-on-a-Chip

• Electrical Engineering
• Mechanical Engineering
• Materials Engineering

1. Microelectronics, micro/nanotechnology courses 2. Clean room fabrication experience 3. Enthusiasm for material fabrication and characterizations 4. Familiar with SEM, and TEM analysis.

ME

Tiwei Wei

This project is one of several SCALE SURF research projects, and is restricted to US citizens. If you are interested in more than one SCALE SURF project, you can apply to all of them with one application. ** Be sure to address each project by name in your application. ** See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

Low-melting point metals based on tin are used to connect semiconductor packages to circuit boards. The specific solder composition that is chosen for a product depends on the product's use conditions, for example, consider the differences in use conditions for a cell phone, an implanted pace maker, strapped onto a car engine, and in a satellite.. This project explores the performance and manufacturing differences between solders for different use cases as a function of composition and application. We are collaborating with researchers from Auburn University, the University of Maryland, Raytheon, BAE Systems, the Department of Defense to develop a guide for solder selection for aerospace and defense applications. These researchers have backgrounds in materials engineering, mechanical engineering, industrial engineering, and electrical engineering, so many different skill sets are needed and you will see different perspectives. This project will require extensive review of the literature and performing materials characterization, processing, manufacturing, and reliability experiments. Student researchers will learn a wide range of materials and mechanical property, processing, and characterization techniques and will work closely with faculty and graduate students from Materials Engineering and Mechanical Engineering.

To apply to a SCALE SURF project, go to the SURF website: https://engineering.purdue.edu/Engr/Research/EURO/SURF/Research/Y2023
In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Preferred majors:
• Materials Engineering
• Mechanical Engineering

Required Experience and Skills:

Desired experience:
• Experience with programming in Python, C/C++, and/or MATLAB.
• Enthusiasm for scientific research.
• Understanding of introductory materials science and engineering concepts.

Academic Years Eligible:
Rising juniors and seniors with the desired experience will be preferred, but rising sophomores are also eligible to apply.

Advanced Packaging, Heterogeneous Integration, Material Processing and Characterization, Microelectronics

• Materials Engineering

• Experience with programming in Python, C/C++, and/or MATLAB. • Enthusiasm for scientific research. • Understanding of introductory materials science and engineering concepts.

Materials Engineering

Carol Handwerker

This project is one of several SCALE SURF research projects, and is restricted to US citizens. If you are interested in more than one SCALE SURF project, you can apply to all of them with one application. ** Be sure to address each project by name in your application. ** See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

Heterogeneous integration of different dielets (processor, memory, RF, etc.) has made rapid strides in the last decade driven by the development of three-dimensional (3D) integration, fan-out wafer-level packaging, and interposers. A key requirement of package scaling is the reduction of the I/O pitch, which requires elimination of solder and micro-solder bumps. Scaling of solder bumps below 40 µm pitch is challenging due to multiple issues, such as solder extrusion, bridging and intermetallic compound (IMC) formation. Therefore, micro and nano-Cu interconnects using Cu to Cu thermal compression bonding and hybrid bonding have been demonstrated for next generation heterogeneous integration. However, nano-Cu interconnects suffer from electromigration related failures at sub-micron pitch sizes. Here we propose Cu, Ag or cobalt composite with graphene or reduced graphene oxide for compliant and high conductivity interconnects. Graphene is a 2D array of sp2-bonded carbon atoms and is known to have extraordinary electrical and mechanical properties. The carrier mobility of graphene is 2.5 x 104 cm2V-1s-1 and the maximum current carrying capacity is up to 108 Acm-2, therefore, graphene-based materials show great potential for future interconnect technologies such as Cu-graphene or Co-graphene or Ag-graphene composites. SURF student will prepare Cu-graphene, Co-graphene, Ag-graphene composites and measure thermal conductivity using a TLM test structure. Multi-photon 3D printing will also be explored to define nanometer feature size. Future work will include effect of these composites on mechanical, thermal and electromigration properties.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Advanced Packaging, Heterogeneous Integration, Material Processing and Characterization, Microelectronics, Nanotechnology

• Mechanical Engineering,
• Materials Engineering
• Chemical Engineering

MSE230 or introductory materials course. Training will be provided on SEM and other tools needed.

School of Mechanical Engineering

Shubhra Bansal

This project is one of several SCALE SURF research projects, and is restricted to US citizens. If you are interested in more than one SCALE SURF project, you can apply to all of them with one application. ** Be sure to address each project by name in your application. ** See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

Semiconductor Research Corporation (SRC) identifies the need for solders with peak reflow temperature less than 140 ℃ for Si heterogeneous integration and high temperature solders for SiC heterogeneous integration. Sn-based solders have shown promise for low-temperature regime and Bi-based solders are promising for high temperature applications. Both these classes of solder materials have their own challenges. For fine pitch interconnects, conventional Sn-based solder materials suffer from drawbacks including die stress due to high reflow temperatures, intermetallic formation, Sn-whisker growth and electromigration. Bi-based solders suffer from wettability issues. Here we to propose to develop a disruptive approach to tailoring properties of solder materials by changing their structural dimensionality. For example, Melting point depression of 26.6 ℃ has been observed for SAC nanoparticles with an average diameter of 18 nm for extremely fine pitch 2-8 µm applications. However, the difficulty lies in the reflow process due to formation of oxide and thereby impeding the coalescence of molten core particles. Reducing fluxes and acidic treatments have proven to be promising for oxide removal, however, the acidity of solution can alter the particle size, morphology and package integrity. Our intent is to explore the effect of the number of atomic layers on solder properties, which can be translated into a commercial process, if successful. Precursor based solution processing can be used to process quantum dots, 1D, 2D structures of these solders that should conceptually result in suppression of melting temperature and reduction in Sn-whisker growth. In the proposed project we will study the effect of dimensionality on Sn-Ag-Cu, Sn-Bi, Sn-In low temperature and Bi-based high temperature solders. SURF student will develop proof-of-concept with commercially available Sn-Ag-Cu and Sn-Bi solder and use ion-milling to exfoliate monolayers of the material. The monolayers will be passivated with organic ligands and subsequently melting temperature will be measured using differential scanning calorimetry (DSC). We will collaborate with GE Global Research and University of Binghamton for development of Bi-based high temperature solders. Future work will include development of processing methods for dimensionally modified solders, integration, reliability studies, etc.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Advanced Packaging, Heterogeneous Integration, Material Processing and Characterization, Microelectronics

• Mechanical Engineering

Mechanical Engineering

Shubhra Bansal

This project is one of several SCALE SURF research projects. SCALE projects are restricted to students who are U.S. Citizens. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

For the typical 3D integration scheme, die-to-wafer bonding is a key technology that can enable the stacking of different chips, such as logic, memory, or power devices. Compared with wafer-to-wafer bonding, it is challenging for die-to-wafer bonding to achieve high throughput while maintaining a high alignment accuracy. Researchers have been investigating different self-alignment technologies to improve the high-precision chip alignment accuracy for die-to-wafer bonding, such as Surface tension-driven with hydrophilic chip surfaces. In this topic, we will explore innovative self-alignment methods for advanced die-to-wafer bonding, enabling high throughput heterogeneous integration.

Reference: Fukushima, Takafumi, et al. "Self-assembly technologies with high-precision chip alignment and fine-pitch microbump bonding for advanced die-to-wafer 3D integration." 2011 IEEE 61st Electronic Components and Technology Conference (ECTC). IEEE, 2011.)

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Advanced Packaging, Composite Materials and Alloys, Fluid Modelling and Simulation, Heterogeneous Integration, Material Modeling and Simulation, Material Processing and Characterization, Microelectronics, Nanotechnology, Thermal Technology

• Electrical Engineering
• Mechanical Engineering
• Materials Engineering

1. Microelectronics, micro/nanotechnology courses 2. Clean room fabrication experience 3. Enthusiasm for material fabrication and characterizations 4. Familiar with SEM, TEM analysis 5. Fluid mechanics Academic Years Eligible: Rising juniors and seniors with the desired experience will be preferred, but rising sophomores are also eligible to apply.

ME

Tiwei Wei

This project is one of several SCALE SURF research projects. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023. Please note that US citizenship is required to receive a SURF fellowship for this specific project.

Since there are multiple types of radiation in space environments, it is important to shield against these different sources. However, different materials have different levels of shielding against different radiation sources. In this project, we will devise a hybrid shielding material to protect against multiple sources of radiation (e.g., neutrons and protons.)

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Material Modeling and Simulation, Microelectronics, Radiation Hardening

• Electrical Engineering
• Nuclear Engineering
• Computer Engineering
• Materials Engineering

1. Experience with programming in Python, C/C++, and/or MATLAB. 2. Enthusiasm for scientific programming. Understanding of radiation transport and electromagnetism.

Electrical & Computer Engineering

Peter Bermel

This project is one of several SCALE SURF research projects. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023. Please note that US citizenship is required to receive a SURF fellowship for this specific project.

One of the important limits for device operation is the space-charge limit, which corresponds to the maximum allowed current before no more electrons cannot be emitted into a diode. This limit is given by the Mott-Gurney law in a trap-free solid or the Mark-Helfrich law for a solid with traps distributed exponentially in energy. Because ionizing radiation will create electrons and ions in a semiconductor device, this project will involve elucidating the effect of these charges on these limits. This may include using simulations to characterize behavior or adapting analytic theories to include ionizing radiation effects.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Material Modeling and Simulation, Microelectronics, Nanotechnology, Radiation Hardening

• Nuclear Engineering
• Electrical Engineering
• Materials Engineering
• Computer Engineering

1. Experience with programming in Python, C/C++, and/or MATLAB. 2. Enthusiasm for scientific programming. Understanding of radiation transport and electromagnetism.

Nuclear Engineering

Allen Garner

This project is one of several SCALE SURF research projects. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023. Please note that US citizenship is required to receive a SURF fellowship for this specific project.

Solar cells are used as the primary power source for earth-orbiting satellites and as a primary/secondary source for various missions within the solar system. However, high energy particles from the sun, planetary magnetospheres, and the galaxy can impact solar cells in outer space. This can affect the performance and life expectancy of the space solar cell and associated power systems. Therefore, this study will analyze the performance of space solar cells, particularly the SolAero IMM-α, at various planetary orbits, such as Earth and Jupiter. This is done by using the Naval Research Lab Displacement Damage Dose (DDD) methodology by (1) obtaining particle fluence data and calculating the DDD of a specific orbit using SPENVIS; and (2) analyzing the solar cell’s performance/degradation with the given DDD.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Material Modeling and Simulation, Microelectronics, Radiation Hardening

• Electrical Engineering
• Nuclear Engineering
• Computer Engineering
• Materials Engineering
• Mechanical Engineering

1. Experience with programming in Python, C/C++, and/or MATLAB. 2. Enthusiasm for scientific programming. Understanding of radiation transport and electromagnetism.

Electrical Engineering

Peter Bermel

This project is one of several SCALE SURF research projects. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023. Please note that US citizenship is required to receive a SURF fellowship for this specific project.

Commercial off-the-shelf electronics are appealing for satellite applications because of their high capabilities (e.g., processing speed or memory). While they are generally tested for reliability for terrestrial applications, most manufacturers don’t have time to test or qualify them for space applications. In this project, we’ll select a novel commercial device to test, and develop a test procedure for testing. Last summer, our methodology was applied to a commercial magnetoresistive random access memory (MRAM) device, using a Gammacell chamber on campus. We will have the option to either extend that previous work or test a novel commercial device that has not been tested before.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Material Processing and Characterization, Microelectronics, Radiation Hardening

• Electrical Engineering
• Computer Engineering
• Nuclear Engineering
• Materials Engineering
• Mechanical Engineering

1. Experience with programming in Python, C/C++, and/or MATLAB 2. Enthusiasm for scientific programming. Understanding of radiation transport and electromagnetism.

Electrical & Computer Engineering

Peter Bermel

This project is one of several SCALE SURF research projects. By applying to this project, you can be considered for any of the SCALE projects with one application. See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

System on Chip Extension Technologies (SoCET) is a long running chip design team intended primarily for undergraduates to get experience in as many aspects of chip design, fabrication, and test as possible. The team is organized like a small chip design company with sub-teams for logic design, verification, chip-layout, analog design, printed circuit board (PCB) design, test, software, and special research projects in collaboration with research groups in ECE. Special projects include applications in hardware security and GPU design. Based on your interests and background, team leaders will work with you to assign you to an appropriate sub-team or special project. Because of the wide range of projects, the experience and skill requirements for SoCET are flexible. Almost any kind of background in circuit design, logic design, circuit simulation, computer architecture, and microcontroller programming will be useful in some part of the team. For more details on possible projects and sub-teams, see https://engineering.purdue.edu/SoC-Team.

In your application, please specify which of the SCALE technical areas you are most interested in. The
technical areas are:
• Radiation Hardening
• System-on-Chip (indicate this if you are interested in SoCET)
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation

Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects. For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Computer Architecture, Microelectronics, Nanotechnology, System-on-a-Chip, Other

• Electrical Engineering
• Electrical Engineering Technology
• Computer Engineering
• Computer Engineering Technology
• Computer Science

Almost any kind of background in circuit design, logic design, circuit simulation, computer architecture, and microcontroller programming will be useful on some part of this project.

Electrical and Computer Engineering

Mark Johnson

This project is one of several SCALE SURF research projects, and is restricted to US citizens. If you are interested in more than one SCALE SURF project, you can apply to all of them with one application. ** Be sure to address each project by name in your application. ** See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

Most of the materials we encounter in our daily lives are ‘bulk’ materials – they contain an enormous number of atoms in all three dimensions. However, if we instead consider materials with one dimension of only a few atoms in thickness, like graphene, we can achieve many unique physical and chemical properties unique from their bulk counterparts. For example, 2D magnetic materials have drawn significant attention because of their application in spintronics and quantum computing. One class of 2D materials with the potential to serve as the first room-temperature 2D magnets are MXenes, near atomically thin transition metal carbides or nitrides. For a magnetic material, the configuration can be ferromagnetic (FM) or antiferromagnetic (AFM) depending on the direction of spins of electrons. Using electronic structure calculations based on density functional theory (DFT), we can identify the magnetic configuration with lower energy. Further, the critical temperature, e.g. Curie temperature, is the temperature above which the material loses the spontaneous magnetization. For real-world applications, magnetic materials with a critical temperature that is higher than room temperature are desired. This project will combine DFT calculations to discover magnetic MXenes with high Curie temperatures.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Big Data/Machine Learning, Deep Learning, Material Modeling and Simulation, Microelectronics, Nanotechnology

• No Major Restriction

Introductory materials science or physics/chemistry of materials. Introductory programming

MSE

Alejandro Strachan

This project is one of several SCALE SURF research projects, and is restricted to US citizens. If you are interested in more than one SCALE SURF project, you can apply to all of them with one application. ** Be sure to address each project by name in your application. ** See https://nanohub.org/groups/scale/research_su23 to view all of the SCALE SURF research projects for summer 2023.

2D materials are a class of crystalline solids with a single layer only a few atoms thick. Because of their ultrathin body, 2D materials possess unique physical and chemical properties that are usually not seen in their bulk counterparts. Nowadays, 2D materials have been widely applied in solar cells, memory devices, chemical sensors. One emerging subset of the 2D materials class is MXenes, a new type of 2D material that has been successfully synthesized and studied in the last decade. MXenes are defined by a transition metal carbide or nitride with only atomically thin layers. The properties of a specific MXene are not always suitable for a given application, and one way to tune their properties is to apply strain. The mechanical strain has effects on the electronic and magnetic properties of materials because the strain changes the crystal structure of the materials. For example, the band gap of a material is an important property for electronic applications, and studies have shown that for some 2D materials, biaxial tensile strain decreases the band gap. Different strains, including biaxial, uniaxial, tensile, and compressive, also each have a different effect on the properties. In this project, the strain-tuned electronic and magnetic properties of novel MXenes will be studied. The physical mechanism behind the strain-induced properties will be characterized based on the change of crystal structures.

In your application, please specify which of the SCALE technical areas you are most interested in. The technical areas are:
• Radiation Hardening
• System-on-Chip
• Heterogenous Integration/ Advanced Packaging
• Program Evaluation
Be sure to name any specific SCALE projects you are interested in, and include information about how you meet the required and desired experience and skills for each of these projects.

For US citizen students who are interested: you can become part of the Purdue microelectronics program called SCALE, sponsored by the Department of Defense. In SCALE, you will have opportunities for continuing research (paid or for credit) and industry and government internships throughout your time at Purdue. Please apply to SCALE here: https://research.purdue.edu/scale/.

Big Data/Machine Learning, Material Modeling and Simulation, Microelectronics, Nanotechnology

Introductory materials science or materials physics/chemistry Introductory programing

MSE

Alejandro Strachan