Project Description

Efficient and reliable edge AI hardware holds great potential unlocking true on-vehicle intelligence for autonomous driving. Driven by unique challenges in energy efficiency, performance, and reliability, this project will develop first-of-its-kind, accelerator-package co-designed AI hardware prototype for edge transformers, exploiting the unique opportunities where chiplet architectures with scaled 3D interconnects through silicon vias (TSVs) meet thermal-friendly compute-in-memory (CIM) chip designs. The postdoc fellow will work with PIs to create first silicon-prototype-driven, systematic electrical-thermal co-design framework for CIM chiplets, with a novel heterogeneous-CIM chiplet (H-CIMlet) 2.5D silicon interposer test vehicle with scaled TSVs and hybrid bonding approaches. Enhanced heat extraction solutions along with new models will be developed to investigate thermal and mechanical reliability. The PIs have established in-house experiment/characterization capabilities as well as active foundry tapeouts with unique access to a specialized CIM device technology. The project holds great potential in evolving into a “Transformer SiP Metrology Platform” through closed-loop design-prototyping-testing. Driven by the “lab-to-fab” vision outlined in the CHIPS Act, the project team actively engage in industry collaborations (e.g., MediaTek, TSMC, IMEC, Samsung). The postdoc fellow is expected to lead the work towards flagship conference and high-impact journal publications with various modeling, fabrication, and chip measurement results.

Start Date

Early 2025

Postdoc Qualifications

1. PhD in Electrical and Computer Engineering, Mechanical Engineering, Materials Science, or a related field, completed by the start date of the position.
2. Proven research track record in the fields of artificial intelligence hardware, advanced packaging, and electrical-mechanical-thermal co-designs.
3. Experience in ASIC chip designs and experimental prototyping for advanced packaging and heterogeneous integration.
4. Team mindset and good communication skills.

Co-advisors

Haitong Li, haitongli@purdue.edu, School of Electrical and Computer Engineering, https://engineering.purdue.edu/NanoX/;

Tiwei Wei, wei427@purdue.edu, School of Mechanical Engineering, https://s-pack.org/

Bibliography