ASIP Consortium Kickoff Workshop - October 6-7, 2026
October 6-7, 2026
ASIP invites you to attend the kickoff workshop on October 6-7, 2026. Please RSVP to Ganesh Subbarayan (ganeshs@purdue.edu) with copy to Betsy Baxter (ebaxter@purdue.edu).
As transistor scaling according to Moore’s law slows, future applications will require novel system integration solutions to achieve performance, power, and cost tradeoffs while ensuring efficient power conversion and delivery, signal and power integrity, sustainability, testability, and security goals. Increasingly, future electronic systems for computing, mobile communications, IoT, automotive, defense and biological applications will rely on advanced integration of separately manufactured chiplets into a 2.5D/3D System-in-Package (SiP).
This consortium kickoff workshop will bring together industry and academic leaders to address research, lab-to-fab translation, and partnership needs in advanced packaging. Sessions include keynotes from SK hynix and AMD, technology highlights from GlobalFoundries, Lam Research, imec, and Dassault Systèmes, panels on materials, reliability, metrology, and academic research needs, Purdue faculty research overviews, and lab tours.
Highlights
- Keynote talks by SK hynix and AMD
- Four technology highlight talks by industry experts from GlobalFoundries, Lam Research, imec, and Dassault Systèmes
- Two panel discussions, one by leading industry experts on materials, reliability and metrology, and the second by leading academic researchers
- Purdue faculty research overviews and lab tours
- Student poster session and reception
- Tours of Birck Nanotechnology Center, Flex Labs, CTRC, and CoSMAP labs
Recent News
- Purdue-led $4.05 million award involving nine PIs from five universities (Purdue, Binghamton University, Penn State University, UCLA, and University of Minnesota) under the SRC SPARC track “INSPIRE: INnovation in System Packaging and Integration REsearch” was announced on August 18, 2026. Read the announcement.
- On August 27, 2026, SK hynix officially broke ground for its HBM production base in West Lafayette, Indiana. As part of the ceremonies, Purdue signed an MOU for Advanced Packaging R&D with SK hynix. More information.
Agenda
Location: East/West Faculty Lounges (Rooms 240 and 250), Purdue Memorial Union, Purdue University, West Lafayette, IN 47907
October 6, Tuesday — Open session
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7:30-8:30 AM |
Registration and breakfast |
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8:30-8:45 AM |
Welcome remarks by Purdue administration |
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8:45-9:00 AM |
ASIP Overview |
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9:00-9:45 AM |
Keynote 1 SK hynix Advanced Packaging Challenges, West Lafayette plans |
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9:45-10:15 AM |
Keynote 2 AMD Advanced Packaging Challenges |
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10:15-10:30 AM |
Coffee Break |
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10:30-10:50 AM |
Technology Highlights 1: GlobalFoundries |
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10:50 AM-12:00 PM |
Purdue faculty research highlights |
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12:00-1:00 PM |
Lunch and Group Photo |
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1:00-1:20 PM |
Technology Highlights 2: Lam Research — Advanced Packaging Equipment-Materials Co-Optimization and Challenges |
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1:20-1:40 PM |
Technology Highlights 3: imec — Advanced Packaging Programs and Purdue Partnership |
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1:40-2:45 PM |
Panel Discussion 1: Materials, Reliability, and Inspection challenges |
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2:45-3:00 PM |
Coffee Break |
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3:00-3:20 PM |
Technology Highlights 4: Dassault Systèmes — Virtual Twins |
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3:20-4:00 PM |
Panel Discussion 2: Academic Research Needs and Funding Challenges |
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4:00-6:30 PM |
Tours of Birck Nanotechnology Center, Flex Labs, CTRC, and CoSMAP labs |
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6:30-7:00 PM |
Reception and 30-second student introductions to their posters |
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7:00-8:30 PM |
Dinner + student posters |
October 7, Wednesday — Closed session for current ASIP consortium members
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8:30-9:00 AM |
Breakfast |
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9:00-10:30 AM |
Industry needs discussion |
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10:30-10:45 AM |
Coffee Break |
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10:45 AM-12:00 PM |
Discussion and prioritization of project topics |
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12:00 PM |
Box lunch and adjourn |
About Microelectronics Research and Education at Purdue University:
College of Engineering at Purdue University is ranked 4th in the US and graduates more engineers than the top three ranked institutions combined. Purdue’s excellence at scale is exemplified by the many national and international microelectronic research centers at Purdue that have received over $250 million in research funding. Specifically, in Advanced System Integration and Packaging, Purdue hosts five centers that together conduct nearly $90 million in research. Purdue University, through its expert faculty, is actively involved in guiding the formulation of the CHIPS Act R&D programs and is vigorously engaged with industry partners on all elements of CHIPS Act programs.
Complementary to the research mission, Purdue created the nation’s first MS degree program in semiconductors, with more than 55 Purdue faculty members teaching over 100 courses on semiconductors and advanced packaging. Purdue’s educational innovations to motivate talented undergraduate students to pursue careers in semiconductors include the freshmen-level seminar course “Changing the World with Chips - Introduction to Semiconductors,” and a unique eight-week hands-on experience in chip design and fabrication termed “Summer Training, Awareness, and Readiness for Semiconductors (STARS).” More information at https://engineering.purdue.edu/semiconductors.
Contact: Betsy Baxter or Ganesh Subbarayan