"My experience at Purdue University really shaped me as an engineer and also as a person; at Purdue, I worked with many exceptionally talented folks that I continue to keep in touch with and I couldn’t have asked for a better role model in an advisor with Professor Mark Lundstrom. I would encourage anyone contemplating an engineering profession to also consider continuing on to graduate school because that’s where one really learns what engineering is about, and second to consider pursuing it at Purdue, an institute with exemplary faculty and outstanding research."

 

Dr. Mark Stettler is Vice President in the Technology and Manufacturing Group and director of process technology modeling at Intel Corporation. He manages a group responsible for the development and application of physically rigorous models for transistor operation and fabrication, interconnect and package performance, and process equipment operation. These models are used to define and enable Intel's process development and transistor roadmap. Within the last decade, his group was involved with introducing transistor stress, hi-k metal gates, and also finfets, major innovations in production transistor design that have helped maintain performance as microprocessor features scale smaller.

Prior to this position, Dr. Stettler held various management roles at Intel related to device and process modeling, compact model development, and process file extraction. He began his career as a modeling engineer, using device and process simulation tools to support 0.25µm, 0.18µm and 0.13µm process development.  Dr. Stettler has five issued patents and more than 40 publications in the field of semiconductor device modeling and process development.  

He received a master's degree and a Ph.D. in electrical engineering from Purdue University in 1990 and 1993, respectively.  He earned a bachelor's degree in electrical engineering from the University of Notre Dame in 1988.