Normally Offered:

Each Spring

Campus/Online:

On-campus and online

Requisites:

ECE 56500

Requisites by Topic:

Computer Architecture

Catalog Description:

This class builds on previous knowledge of general-purpose processor design to explore the space of programmable hardware accelerators. Hardware accelerators seek to fulfill the promise of continued performance and energy-efficiency gains in the era of a slowing Moore's law, larger problem sizes and an increased focused on energy-efficiency. These factors have caused hardware acceleration to become ubiquitous in today's computing world and critically important in computing's future. This class will introduce students to the architectures of programmable accelerators. We will delve deeply into the architectures of modern massively parallel accelerators like GPUs, culminating in a course project using an open-source research and development simulator used in academia and industry. General topics in hardware acceleration will be discussed, including but not limited to GPGPU and massively parallel computing, approximate accelerators, reconfigurable hardware and programmable hardware for machine learning.

Learning Outcomes

A student who successfully fulfills the course requirements will have demonstrated an ability to:

• Explain the design of contemporary programmable accelerators (i.e. GPUs) and how the programming model relates to the design
• Program a GPU using CUDA to perform data parallel tasks and perform performance optimizations on their code, leveraging knowledge of the architectures design
• Prototype modifications to the architecture using a simulation infrastructure
• Describe state-of-the-art research in the programmable accelerator space and implement/evaluate those designs in simulation
• Describe and contrast contemporary machine-learning accelerators with traditional programmable accelerators

Lecture Outline:

Assessment Method:

Programming assignment, paper reading & class participation, final project