ECE 25500 - Electronic Circuit Analysis and Design
This course is an CMPE Core Course for catalog terms prior to Fall 2018. For Fall 2018 and later catalog terms it is a CMPE Special Content Elective.
Lecture Hours: 3 Credits: 3
- EE Core
- CMPE Core
Each Fall, Spring
ECE 20100, Minimum Grade of C and (MA 26100 or MA 27101 or MA 17400).
Diode, bipolar transistor and FET circuit models for the design and analysis of electronic circuits. Single and multistage analysis and design; introduction to digital circuits. Computer aided design calculations, amplifier operating point design, and frequency response of single and multistage amplifiers. High frequency and low frequency designs are emphasized.
- Microelectronic Circuits , 7th Edition , Adel S. Sedra and Kenneth C. Smith , Oxford University Press , 2014 , ISBN No. 978-0-19-933913-6
- The ability to identify and correctly utilize the external lead structure and basic electrical characteristics of common semiconductor devices (pn junctions, MOSFETs, and BJTs). 
- The ability to analyze and design d.c. bias circuits. [1,2]
- The ability to utilize d.c. and a.c. models of semiconductor devices in both analysis and design. [1,2]
- The ability to analyze and design single and multistage amplifiers at low, mid and high frequencies. [1,2]
- The ability to use a CAD tool (e.g., SPICE) in circuit analysis and design. [1,2,6]
|2||Diodes, diode models, diode applications|
|3||Bipolar junction transistors, BJT circuits|
|2||MOSFETs, MOSFET circuits|
|1||Transistor applications, Multi-stage circuits|
|1||BJT amplifiers, BJT hybrid-pi model|
|1||MOSFET amplifiers, MOSFET hybrid-pi model|
|1.5||Single-stage transistor amplifiers|
|.5||Multi-stage transistor amplifiers|
|2||Frequency response, high-frequency models|
|1||High-frequency multi-stage amplifier analysis and design|
Engineering Design Content:
Engineering Design Consideration(s):
(1). Questions on the three mid-terms and the final exam will be associated with outcomes i-iv, and the mean score and standard deviation for each outcome will be computed. The number of students achieving a minimal level of competency (e.g., within 1.5 standard deviations of the mean) for each outcome will be summarized. (2). The mean score on CAD tool (e.g., Spice) homework assignments will be used to assess outcome v. The number of students demonstrating a minimum acceptable performance level (including having submitted all CAD tool assignments) will be summarized.