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ECE 27000 - Introduction to Digital System Design

Lecture Hours: 3 Lab Hours: 3 Credits: 4

Professional Attributes
EE Core

Normally Offered: Each Fall, Spring

ECE 20100 [may be taken concurrently]

Catalog Description:
An introduction to digital system design, with an emphasis on practical design techniques and circuit implementation.

Required Text(s):
  1. Digital Design Principles and Practices, 4th Edition, John Wakerly, Prentice Hall, ISBN No. 9781323613894.

Recommended Text(s): None.

Learning Objectives:

A student who successfully fulfills the course requirements will have demonstrated:
  1. an ability to analyze and design CMOS logic gates. [a,e,k]
  2. an ability to analyze and design combinational logic circuits. [a,e,k]
  3. an ability to analyze and design sequential logic circuits. [a,e,k]
  4. an ability to analyze and design computer logic circuits. [a,e,k]
  5. an ability to realize, test, and debug practical digital circuits. [b,c,k]
Assessment Method for Learning Objectives: You will earn 1% bonus credit for each course outcome you successfully demonstrate. For Outcomes 1-4, basic competency will be assess based on exam questions, for which a minimum score of 60% will be required. Two opportunities will be provided to demonstrate competency in these outcomes: (1) the Primary Assessment Exams and (2) the Comprehensive Final Assessment Exam. A score equal to or greater than the passing threshold on either of these assessments will be sufficient to establish basic competency. For Outcome 5, basic competency will be assessed based on the Lab Practical Exam, for which a minimum score of 60% will be required.

Lecture Outline:

Week(s) Lecture Topics
1 Electronic components, logic symbols and gates, introduction to CMOS logic circuits.
2 Steady-state and dynamic behavior of CMOS circuits, other CMOS input/output structures.
3 CMOS and TTL logic families, CMOS-TTL interfacing, switching algebra.
4 Combinational circuit analysis and synthesis, standard forms, logic function minimization.
5 Incompletely specified functions, timing hazards, logic circuit documentation standards. Outcome 1 & 2 Primary Assessment.
6 Introduction to ABEL and combinational programmable logic devices.
7 Decoders, encoders, tri-state buffers, multiplexers, XOR functions.
8 Signed number notation, radix arithmetic, half-adders, full-adders, radix adder/subtractors, condition codes.
9 Comparators, carry look-ahead adders, combinational multipliers, BCD adder/subtractors. Outcome 3 & 4 Primary Assessment.
10 Bistable analysis, feedback sequential machines, metastability, latches, flip-flops.
11 Synchronous state machine analysis and synthesis, clocking considerations, design examples.
12 ABEL sequential circuit design features, sequential programmable logic devices, macrocell features, counter registers, shift registers, state decoding.
13-14 Design and implementation of a simple computer. Outcome 5 & 6 Primary Assessment.
15 Review, course summary and evaluation, sample senior project presentations.
16 Outcome 1-6 Final Assessment.

Lab Outline:

Week(s) Lab Experiments
1 Lab Organization
2 Demonstration of Basic Logic Functions
3 Measurement of Gate Electrical Characteristics
4 Measurement of Gate Timing Characteristics
5 Implementation of Dual and Complement Functions
6 Investigation of Timing Hazards
7 Introduction to isp Design Expert TM and Programmable Logic Devices
8 7 Segment Alphabetic Decoder
9 Twos Complement 4-bit Magnitude Comparator
10 BCD Adder/Subtractor
11 Introduction to Sequential Circuits
12 State Machine
13 Combination Lock
14 4-bit Arithmetic Logic Unit with Condition Codes
15 Simple Computer

Engineering Design Content: