ECE 56500 - Computer Architecture

Course Details

Lecture Hours: 3 Credits: 3

Areas of Specialization:

  • Computer Engineering

Counts as:

  • EE Elective
  • CMPE Selective - Special Content

Normally Offered:

Each Fall


On-campus and online


ECE 43700

Requisites by Topic:

Computer design and prototyping; basic 5-stage pipeline, basic caches, basic virtual memory, compilers, operating systems, assembly programming

Catalog Description:

Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course qualitatively and quantitatively examines uniprocessor computer design trade-offs. We will learn, for example, how uniprocessors execute many instructions concurrently and why state-of-the-art memory systems are nearly as complex as processors. Examining tradeoffs requires that you already know how to correctly design a computer, as is taught in the important prerequisite EE 43700.

Required Text(s):

  1. Computer Architecture - A Quantitative Approach (e-book available through Purdue Libraries) , 6th Edition , D. Patterson and J. Hennessy , Elsevier Science , 2017 , ISBN No. 9780128119051

Recommended Text(s):

  1. Readings in Computer Architecture , Mark Hill, Norman Jouppi and Gurindar Sohi , Morgan Kaufmann Publishers

Learning Outcomes

A student who successfully fulfills the course requirements will have demonstrated:

  • an understanding of advanced processor pipelines including mechanisms for hardware or compiler instruction scheduling. renaming, branch prediction, and precise interrupts
  • an understanding of advanced cache techniques including hardware and software schemes for miss ratio reduction and miss penalty reduction, and high-bandwidth design for cache and main memory
  • an understanding of virtual memory including page table design, TLBs, and interaction between caches and address translation
  • an understanding of basic snoopy coherence and the notion of memory consistency models

Lecture Outline:

Weeks Topic
0.5 Introduction
1.0 Performance and Cost
1 Pipelining - implementation and evaluation
4 Advanced pipelining - hardware and compiler techniques
1 Memory Hierarchy - cache design and evaluation
4 Advanced cache and compiler techniques, and virtual memory
1 Input/Output - devices and performance
1.5 Vector processing and multiprocessors
1 Exams

Assessment Method:

Homework, programming assignments, exams. (3/2022)