ECE 27000 - Introduction to Digital System Design
Note:
A minimum grade of C is required for all BSCmpE students to progress to ECE 36200, and for BSEE students electing to complete ECE 36200 in the future.
Course Details
Lecture Hours: 3 Lab Hours: 1 Credits: 4
Counts as:
- EE Core
- CMPE Core
Normally Offered:
Each Fall, Spring
Campus/Online:
On-campus and online
Requisites:
ECE 20100 [may be taken concurrently] or ECE 20001 [may be taken concurrently]
Catalog Description:
An introduction to digital system design, with an emphasis on practical design techniques and circuit implementation.
Required Text(s):
None.
Recommended Text(s):
- Digital Design Principles and Practices , 5th Edition , John Wakerly , Pearson Publication , 2018 , ISBN No. 978-0134460093
Learning Outcomes:
A student who successfully fulfills the course requirements will have demonstrated:
- an ability to analyze and design combinational logic circuits. [1]
- an ability to analyze and design sequential logic circuits. [1]
- an ability to analyze and design computer logic circuits. [1]
- an ability to realize, test, and debug practical digital circuits. [2,6]
Lecture Outline:
| Week(s) | Lecture Topics |
|---|---|
| 1 | logic signals; CMOS logic circuits; transmission gates; basic electronic components and concepts; logic levels and noise margins |
| 2 | number systems; base conversion; signed number notation; radix addition and subtraction |
| 3 | Switching Algebra and Combinational Logic Parts 1-3: switching algebra; combinational circuit analysis and synthesis; characteristics of logic mapping and minimization; timing hazards |
| 4 | CMOS logic circuits; logic levels and noise margins; transition time; propagation delay; three-state; current sourcing and sinking; power consumption and decoupling |
| 5 | Verilog Hardware Description Language |
| 6 | programmable logic devices; combinational building blocks: decoders, encoders, and multiplexers |
| 7 | priority encoders; XOR/XNOR functions |
| 8 | state machine structure and analysis; clocked synchronous state machine synthesis; state machine design examples: sequence generators, counters and shift registers, sequence recognizers |
| 9 | bi-stable elements; set-reset and data latches; data and toggle flip-flops |
| 10 | Counters and Shift Registers |
| 11 | Comparator circuits |
| 12 | adder; subtractor; carry look-ahead adder circuits; multiplier circuits; BCD adder circuits |
Lab Outline:
| Week(s) | Lab Experiments |
|---|---|
| 1 | No Lab |
| 2 | Lab intro |
| 3 | Familiarization with Tools |
| 4 | Electrical and timing characteristics of logic gate |
| 5 | implementing Boolean expressions and circuits |
| 6 | Timing Hazards |
| 7 | TBD |
| 8 | Intro to Verilog on FPGAd |
| 9 | Decoders |
| 10 | FSM construction |
| 11 | Flip flops and ring counters |
| 12 | FSM sequence detector |
| 13 | Counters, FSM, hangman game |
| 14 | Hexadecimal calculator |
Engineering Design Content:
- Synthesis
- Analysis
- Construction
- Testing
Assessment Method:
Exams, homework and practicals