ECE 595A - CMOS Analog IC Design

Note:

Objective: The course fulfills a need for a graduate level CMOS analog IC design course that covers both general analog IC design theory and practical design methodology.

Course Details

Lecture Hours: 3 Credits: 3

Counts as:

Experimental Course Offered:

Spring 2006

Catalog Description:

A significant portion of a modern signal processing system handles digital signals. But front- and back-end interfaces have to involve analog signal conditioning. Typically the front- and back- end analog conditioning circuits handle the highest frequency signal in the system and are key blocks affecting the overall system performance. RF IC for wireless digital communications, high-speed clock and data recovery for wireline serial interface, and high sensitivity sensor interface are a few of them. The advance and prosperity of CMOS technology enabled high-speed/performance analog IC design. The course will discuss the broad topics in CMOS analog IC design including current/voltage biasing, noise analysis, OP-Amp design and compensation, integrated active filter, PLL, and ADC/DAC. State- of-the-art designs and current research topics will be introduced. A design project will be a key component of the course. The students will conduct group design project, and obtain practical design knowledge and skills. Process Design Kit (PDK) and EDA tools like Cadence Schematic Editor, Layout Editor, and Simulator (Hspice or SpectreRF) will be provided for the design project.

Required Text(s):

  1. Design of Analog CMOS Integrated Circuits , Behzad Razavi , McGraw Hill , ISBN No. 0-07-238032-2

Recommended Text(s):

  1. Analog Integrated Circuit Design , David A. Johns & Ken Martin , Wiley , ISBN No. 0-471-14448-7

Learning Outcomes:

A student who successfully fulfills the course requirements will have demonstrated:
  1. an ability to analyze bias circuit using CMOS current mirror. [None]
  2. an ability to design differential operational amplifier. [None]
  3. an ability to analyze basic gm-C filter. [None]
  4. an ability to analyze basic operation of PLL. [None]
  5. Experience in oral presentation, teamwork, and document preparation for a finished design project. [None]

Lecture Outline:

Lectures Topics
2 Device physics, modeling, and layout
2 Current Biasing
2 Voltage Reference
3 Noise Analysis
7 OP-Amp Design & Compensation
1 Design Project Review I
1 Exam 1
5 Integrated Filter Design - Gm-C
5 Integrated Filter Design - Switched Capacitor Filter
6 Phase Locked Loop
6 ADC/DAC Design
1 Design Project Review II

Engineering Design Content:

  • Establishment of Objectives and Criteria
  • Synthesis
  • Analysis

Engineering Design Consideration(s):

  • Economic
  • Manufacturability

Assessment Method:

2 midterms and 1 design project: The first midterm exam will cover bias circuit design using CMOS current mirror an analysis of differential operational amplifier. The second midterm exam will cover gm-C filter analysis and operation principles of PLL. The students will be asked to present their design at the end of the semester.