Note:

This course is a required CMPE Advanced Elective for catalog terms prior to Fall 2018. For Fall 2018 and later catalog terms it is a CMPE Selective.

Counts as:

• EE Adv Level Lab
• CMPE Selective

Normally Offered:

Each Fall

Campus/Online:

On-campus only

Requisites:

ECE 33700 and ECE 36200

Catalog Description:

Computer design is the science and art of selecting and interconnecting hardware components to build a computer that meets functional, performance, and cost goals. In this course, students will learn to design a uniprocessor computer system, including processor datapath, processor control, memory systems, and I/O. The course provides a thorough and detailed treatment of basic computer arithmetic algorithms, multi-cycle implementations of modern computer instruction sets, pipelined CPU designs, design of cache hierarchy and virtual memory, and fundamentals of computer system I/O. The course also includes evaluation and analysis of processor and memory performance. A project which involves the design and implementation of multi-cycle CPU, and a pipelined CPU with a cache hierarchy using CAD tools is an integral part of the course.

Learning Outcomes:

1. an understanding of basic computer arithmetic algorithms. [1,2]
2. an ability to understand and implement single-cycle implementations of a computer instruction set. [1,2]
3. an ability to understand and design a pipelined CPU, and cache hierarchy including virtual memory. [1,2]
4. an understanding of the fundamentals of computer system I/O. [1,2]
5. an ability to analyze and evaluate CPU and memory hierarchy performance. [1,6]
6. experience with the design, simulation, and documentation of a single-cycle CPU, and a pipelined CPU with a cache . [1,2,3,6,7]

Lecture Outline:

Lab Outline:

Assessment Method:

none