Purdue leads multi-institution, multidisciplinary, NSF-funded research to address challenges of Heterogeneous Integration
A team of researchers led by Purdue University’s Elmore Family School of Electrical and Computer Engineering aims to address the substantial challenge presented by Heterogeneous integration (HI), the technology that has shown tremendous potential to lead the future advancement of semiconductors.
The effort is funded by a National Science Foundation (NSF) Future of Semiconductors (FuSe) Program teaming grant. The primary aim of the NSF FuSe program is to cultivate a broad coalition of researchers and educators from across science and engineering communities to enable rapid progress in new semiconductor technologies.
Dan Jiao, Synopsys Professor of ECE, is the Principal Investigator on the project, which brings together 13 investigators from six institutions with diverse backgrounds, from materials and device modeling, circuit modeling, thermo-mechanical modeling, to predictive multi-physics modeling; from simulation and analysis to ML-assisted design automation and optimization; and from advanced packaging to RF/Future-G, integrated power electronics, photonics and MEMS. Other Purdue ECE faculty members involved are Cheng-Kok Koh, professor of ECE, Tillmann Kubis, Katherine Ngai Pesic & Silvaco Associate Professor of ECE, and Dana Weinstein, professor of ECE. Additional Purdue researchers are Professors Ganesh Subbarayan and Tiwei Wei from the School of Mechanical Engineering, and Professor Carol Handwerker from the School of Materials Engineering. The collaboration spans six esteemed institutions: Purdue, Dartmouth, University of California at Santa Barbara (UCSB), University of California at San Diego (UCSD), University of Central Florida (UCF), and Stanford University.
The objective of this teaming effort is to break the barriers across applications, design domains, and abstraction levels, in modeling, simulation, optimization, and design through an open-source, multiscale, application-agnostic platform (Open-MAP) for heterogeneous System-in-Package co-design.
“We envision the future success of this project will translate to sustained innovations in the microelectronics industry-at-large and permit the US to maintain global leadership in microelectronics, delivering systems that achieve more-than-Moore scaling for years to come,” said Jiao.
This FuSe project also serves the purpose of fulfilling the future workforce needs in microelectronics, utilizing Purdue’s pioneering Semiconductor Degrees Program (SDP). To attract underrepresented students, the team will establish partnerships with UCF, UCSB, and UCSD, all of which are minority-serving institutions. Additionally, collaboration with Ivy Tech Community College is planned to create training programs for Ivy Tech students.
This FuSe teaming grant was made possible through collaborative research conducted at the Rapid-Hi Design Institute, an Elmore ECE Emerging Frontiers Research Center. This endeavor has also led to the recent awarding of a DARPA NanoSim project to Professors Dan Jiao and Tillmann Kubis, focusing on predictive nanoscale device simulation for the Terahertz Regime.