Rapid Heterogeneous Integration (Rapid-HI) Design Institute


rapid HI group

rapid HI group meeting

Vision


flow chart depicting research approach and interaction between different themes

Heterogeneous integration (HI) is the assembly and packaging of individual components, such as CPUs, GPUs, memory, FPGAs, transceivers, and power regulators, which are separately manufactured using diverse technologies (digital, analog, mixed-signal, RF, MEMS, and photonic integrated circuits (ICs)) and different semiconductor processes (Si, Si-Ge, InP, Si-C, etc., and at different process nodes), onto a single substrate.

Heterogeneous integration (HI) has shown tremendous potential to overcome the limitations and shortcomings of current monolithic integration technology, and effectively combat the slow-down of Moore’s law. “Just as Moore’s law led the advancement of the global semiconductor industry over the past 55 years, HI is and will be the key technology direction going forward.”

However, HI constitutes a grand challenge in engineering since it must simultaneously address the electrical, optical, thermal, mechanical, and material challenges of integrating separately manufactured/designed components into a higher-level System-in-Package (SiP), for a diverse range of technologies (digital, analog, RF, microwave, Photonic, MEMS, etc.). Currently, HI is impeded by the lack of tools for design automation and optimization, and has become a bottleneck of the design flow.

The objective of Rapid-HI Design Institute is to develop rapid and large-scale multiphysics modeling and analysis and multiphysics informed physical design to automate the HI design from intent to fabrication. We will fuse machine intelligence and domain expertise for significantly accelerated modeling, analysis, and optimization. This collaborative research effort will result in a rapid hardware compiler of HI systems enabled by multiphysics (electrical, thermal, and mechanical) design automation and it will be used to transform current manual, partially-automated, and non-optimal practice of package and system design to fully automated and optimized design. The HI hardware compiler will be made open source, contributing to the design ecosystem.

Approach


schematic figure depicting collaboration between the six team members and their areas of expertise

Built upon the team’s collective expertise in advanced packaging, signal and power integrity, physical design, machine learning (ML), and heterogeneous integration (HI), the Rapid-HI Design Institute will develop rapid and large-scale multiphysics modeling and analysis and multiphysics informed physical design to automate the HI design from intent to fabrication. The team will fuse machine intelligence and domain expertise for significantly accelerated modeling, analysis, and optimization. This collaborative research effort will result in a hardware compiler of HI systems enabled by multiphysics (electrical, thermal, and mechanical) design automation and it will be used to transform current manual, partially-automated, and non-optimal practice of package and system design to fully automated and optimized design. The HI hardware compiler will be made open source, contributing to the design ecosystem. In the long run, the HI design technology developed by the center is expected to crosscut the chip, package, and board to achieve a collaborative design with multiphysics/multiscale interactions captured in the whole integrated system. This will lead to revolutionary performance of electronic systems that cannot be imagined today. The Rapid-HI Design Institute will address critical technology gaps in 3DHI, and meanwhile support the other two vectors for overcoming Moore’s law limitation, which are new materials/devices and new models of computation.

Team


 

Leadership

  • Dan Jiao
    Director, Synopsys Professor of Electrical and Computer Engineering, Purdue University

Core Team

  • Cheng-Kok Koh
    Professor of Electrical and Computer Engineering, Purdue University
  • Qiang Qiu
    Assistant Professor of Electrical and Computer Engineering, Purdue University
  • Ganesh Subbarayan
    James G. Dwyer Professor of Mechanical Engineering, Purdue Unviversity
  • Xiaoqian (Joy) Wang
    Assistant Professor of Electrical and Computer Engineering, Purdue University
  • Jianfang (Olena) Zhu
    Senior Principal Engineer, Intel Corporation

Partners


The team collaborates with industry leaders and a broad research community outside ECE. Our partners include colleagues in Mechanical Engineering (ME) and Materials Engineering (MSE) at Purdue, Semiconductor Research Corporation, Cadence, Synopsys, Intel, IBM, University of California, San Diego, University of California, Santa Barbara, Dartmouth College, University of Central Florida, Stanford University, among others.

Publications


Michael Joseph Smith, Seunghyun Hwang, Vinicius Cabral Do Nascimento, Qiang Qiu, Cheng-Kok Koh, Ganesh Subbarayan, and Dan Jiao, ''Real-Time Precision Prediction of 3-D Package Thermal Maps via Image-to-Image Translation,'' IEEE Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 2023.

Hoin Jung, Vinicius C. do Nascimento, Hongyang Liu, Xiaoqian Wang, Cheng-Kok Koh, and Dan Jiao, ''Explainable Planar Multiband Antenna Designer with Wasserstein Generative Adversarial Network,'' IEEE Int. Symposium Antennas and Propagation, July 2024.

Runwei Zhou and Dan Jiao, ''Efficient Neural-Network Based Solution of Integral Equations for Electromagnetic Analysis,'' IEEE Int. Symposium Antennas and Propagation, July 2024.

Elmore ECE Emerging Frontiers Center


The Elmore Family School of Electrical and Computer Engineering created the Elmore ECE Emerging Frontiers Centers initiative to encourage, enable and sustain collaborations among ECE faculty, and others across campus, in emerging research areas that will significantly advance the frontiers of knowledge and have transformative impact on society.