In Package Memory (IPM) technology Engineer is a function in Assembly TD as part of the In-package Memory Technology Integration group. The charter of the In-Package memory organization is to technically develop the DRAM memory technology and supply chain focusing on assembly / test in response to Intel's roadmap and successfully integrating these technologies into Intel's packaging. The memory technology Engineer, as part of the In-package memory organization will need to support In-package memory development activities from path-finding to Ramp through close interaction across multiple organizations.

The technology Engineer is expected to have good knowledge of Basic circuit and logic design, circuit debug, ability to understand and interpret timing diagram's, ability to do python scripting, and  basic Understanding of memory technologies in general.

Engineer is expected to perform statistical data analysis, to compare performance against both specifications and expectations across test cases defined by he/she, internal working groups, industry standards, and component specifications.

The engineer is expected to work jointly with partners in design, signal integrity, test integration, platform, high volume manufacturing, and suppliers in driving requirements, tracking memory yields, root cause analysis, troubleshooting complex issues affecting memory integration. Also to work jointly with Product Failure Analysis team identify memory related issue, yield improvement, ensuring memory meets product expectations, thus supporting world class products delivered by Intel.

The ideal candidate should exhibit the following behavioral traits:

• Able to support multiple technical development activities at the same time, drive technical consistency across platforms on integration issues, and help closure of critical white papers, relating to In-package memory integration.
• work closely across multiple organizations to ensure all material spec are defined and ensure specs are met for certification
• Collaborate across multiple Intel groups is critical for the success of this organization.
• Package Memory Integration Engineer is also expected to work with other semiconductor memory industry in the development of In-Package Memory technology
• Good technical problem solving skills
• Good hand on elec. Characterization skills(//Understand the impact of signal integrity and power delivery and test timings).
• Good listening, written and verbal communication skills and excellent presentation skills.
• Ability to work independently without much supervision

Minimum Qualifications:

The candidate must possess a PhD Elec. Engineering,

Additional Qualifications good to have:

• knowledge of memory manufacturing process and test flow and a deep technical understanding of upcoming memory technology
• Experience with *_Specific knowledge of DRAM, other types of memory along with memory and other high speed interfaces
• Experience with Python scripting. JMP analysis

Contact: ravi.v.mahajan@intel.com