Effortless Efficiency in the Massively Multi-threaded Era
|Event Date:||April 13, 2015|
|Speaker:||Dr. Tim Rogers|
|Speaker Affiliation:||University of British Columbia|
|Open To:||ACCEPTABLE FOR ECE 694
Over the last several decades, two trends have emerged at the bottom and the top of the general purpose computing stack. At the hardware level, Moore’s law has resulted in an exponential increase in microprocessor capability. However, exploiting this increased capability in an energy- efficient manner has led to the creation and proliferation of massively multithreaded processors, like Graphics Processing Units (GPUs). At the application software level, a desire to increase programmer productivity and code portability has increased code’s abstraction level and made microprocessors much easier to program. Reconciling the software industry’s desire for simple code with the hardware industry’s push for energy efficiency presents a number of challenges, particularly surrounding the management of locality.
In this talk, I will discuss processor core innovations that improve massively multithreaded hardware’s management of data locality, without the programmer’s input. Specifically, I will focus on exploring how the scheduling of the many thousands of threads in a GPU affects the memory system. I will detail a novel scheduling microarchitecture that uses feedback from the memory system to curb issue-level scheduling decisions. This scheduler results in significant improvements to both cache hit rate and performance on applications of importance to future GPUs. Using the issue-level thread scheduler to improve cache performance opens up a new design space that previous hardware cache management techniques were unable to explore because of an assumption that the memory access stream is fixed.
Tim Rogers is a PhD candidate at the University of British Columbia, where his research focuses on massively multithreaded processor design. He is interested in exploring computer systems and architectures that improve both programmer productivity and energy efficiency. Tim is a winner of the NVIDIA Graduate Fellowship and the Alexander Graham Bell Canada Graduate Scholarship. His work has been selected as a “Top Pick” from computer architecture by IEEE Micro Magazine and as a “Research Highlight” in Communications of the ACM magazine. During his PhD, Tim has interned at NVIDIA Research and AMD Research. Prior to attending graduate school, Tim worked as a software engineer at Electronic Arts and received his BEng in Electrical Engineering from McGill University.