Associative Computing abilities of Delta I-V Devices
|Event Date:||April 24, 2017|
|Speaker Affiliation:||University of Illinois at Chicago|
|Contact Name:||Professor Kaushik Roy
|School or Program:||Electrical and Computer Engineering
In this talk, I discuss the associative computing abilities of Delta I-V devices, and in particular for (i) Gate/Source-overlapped heterojunction Tunnel-FET (SO-HTFET) and (ii) skewed straintronic MTJ (ss-MTJ). Unique I-V characteristics of SO-HTFET and ss-MTJ are presented. Circuits and systems applying these devices for associative processing, neuromorphic computing, and ternary content addressable memories (TCAMs) are presented. An order of magnitude improvement in area and energy efficiency is gained by the Delta I-V devices in various associative computing platforms. The talk also illustrates a strong interaction between the devices and computing paradigm and explores insights for the optimal design of each.
Amit is an assistant professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago (UIC). He completed his undergraduate and graduate degree from Indian Institute of Technology (IIT), Kanpur, where he was awarded academic excellence award from the institute for his standing in top 5% of his peers. Amit completed his Ph.D Amit from the Department of Electrical and Computer Engineering in Georgia Institute of Technology (Georgia Tech). Amit was awarded 'Sigma Xi Best Ph.D. Thesis' from Georgia Tech. Amit was also awarded IEEE Electron Device Society fellowship in 2014, where he was one of the three recipients worldwide, and only one in Americas. Amit has worked as a research staff member at IBM Semiconductor Research and Development Center from 2008-2010. He was also a research intern at IBM T J Watson research center in summer of 2012, and Intel’s Circuit research lab in summer of 2014. His research interests include low-power computing, emerging technologies, and neuromorphic systems.