Harshit Naman

Harshit Naman, a doctoral student in Purdue University’s Elmore Family School of Electrical and Computer Engineering, has won an Outstanding Student Paper Award at the 2026 IEEE Custom Integrated Circuits Conference for a chip that rethinks how data travels through the brain.

CICC is one of the premier conferences in integrated circuit design.

The receiver, developed in Purdue’s SPARC Lab under the direction of Shreyas Sen, professor of electrical and computer engineering, grew out of a new understanding of the brain as a communication channel. Brain tissue greatly weakens signals passing through it but leaves their timing almost perfectly intact.

By carrying information in the timing of pulses rather than in voltage levels, the chip can stream high-speed neural data through the head using a fraction of the power required by conventional wireless links. That efficiency could be especially important for implants designed to operate for years without heating surrounding tissue.

The paper, “A 16nm 0.67pJ/bit 80Mb/s Circuit-System Co-Optimized Time Domain Brain Channel Receiver,” was presented at CICC 2026 in Seattle in April. Doctoral students Gourab Barik, Sarthak Antal, Samyadip Sarkar and Ming-Che Li are co-authors, with Sen serving as senior author.

The Outstanding Student Paper Award is CICC’s top honor for student research and is selected from student-led papers presented at the conference. The award will be formally recognized at CICC 2027 in San Diego. It also marks the SPARC Lab’s third best-paper honor at CICC, following awards in 2019 and 2021.

The packaged integrated circuit with the die/layout.

The bottleneck is no longer the neurons

Brain-computer interfaces are advancing rapidly. Companies including Neuralink, Synchron and Paradromics have moved implants into human clinical trials, while modern electrode arrays can already record from thousands of sites at once. Next-generation systems are targeting tens of thousands.

The amount of data generated increases just as quickly. Neuropixels-class probes can produce more than 100 megabits per second, while Neuralink-class systems can approach 600 megabits per second.

Getting that flood of information out of the head wirelessly has become a major challenge. Tissue strongly absorbs the gigahertz radio waves used by conventional wireless systems, while strict limits on tissue heating constrain how much power an implant can use.

Today’s implanted wireless links typically reach only a few megabits per second. That forces implants to heavily compress neural signals before transmitting them, potentially discarding information that could be valuable to advanced AI-based neural decoders.

“The remarkable progress in neurotechnology has quietly moved the bottleneck,” Sen said. “We can record from more neurons than we can communicate. The wireless link, not the neural interface, now limits how much of the brain we can listen to, and the only way through is orders-of-magnitude better communication efficiency.”

From ‘brain broadband’ to brain timing

The award-winning chip builds on work the SPARC Lab began several years ago.

In 2023, the group published a paper in Nature Electronics demonstrating biphasic quasistatic brain communication. Instead of sending traditional radio waves through the head, the technique uses tiny electro-quasistatic, or EQS, electric fields to transmit information through brain tissue, essentially using the brain itself as the communication medium.

Because the system operates at relatively low frequencies, it avoids much of the absorption associated with conventional radio waves. The researchers showed that the brain’s EQS channel behaves much like broadband, maintaining a relatively flat response across frequencies while reducing transmit power roughly 41-fold compared with conventional in-body signaling. The electric fields also remain largely confined to the body, providing an added security benefit.

The new research adds another important discovery: Brain tissue may drastically reduce a signal’s strength, but it preserves its timing with remarkable accuracy.

Researchers in the Sen group found that the brain channel behaves more like a network of tiny capacitors than resistors at the frequencies and communication method used in the study. As a result, signal strength can fall by as much as 60 decibels, equivalent to a millionfold reduction in power, between a deep implant and the scalp.

Yet the timing of the signal changes by less than a nanosecond across implant depths ranging from 2 to 8 centimeters.

In simple terms, the brain may dramatically lower the volume of a signal while preserving its rhythm.

The award-winning intergrated chip builds on work the SPARC Lab began several years ago.

A receiver that only needs to tell time

That discovery allowed the Purdue team to approach the receiver differently.

Conventional high-speed communication systems encode information using voltage levels and then expend energy restoring those signals after they have weakened. The Purdue system instead encodes information in the width, or duration, of a pulse.

Rather than precisely measuring a weakened voltage, the receiver primarily needs to determine when a signal edge arrives and how long the pulse lasts.

A small on-chip oscillator counts the duration of each pulse, while a self-referencing system compares measurements with a reference signal included at the beginning of each data packet. This helps compensate for changes in voltage and temperature without requiring energy-intensive clock-recovery circuitry.

The approach also could benefit from continued advances in semiconductor technology. As transistors become smaller, accurately distinguishing between voltage levels can become more difficult. At the same time, transistors switch faster, making increasingly precise measurements of time possible with less energy.

The researchers implemented the receiver using an advanced 16-nanometer FinFET manufacturing process, believed to be the first brain- or body-channel communication receiver fabricated at such an advanced technology node. The same approach could potentially become even more efficient as semiconductor technology progresses.

“Instead of fighting the channel, we designed with it,” Naman said. “The brain attenuates our signal a millionfold in power, yet the timing arrives almost perfectly preserved, so we built a receiver whose only real job is to tell time. Watching waveforms come through 10 centimeters of tissue, decoded on about a twentieth of a milliwatt, was the moment we knew the approach was real.”

Testing demonstrated the receiver’s efficiency. Through a 10-centimeter tissue phantom that reduced the signal by nearly 60 decibels, the chip sustained a data rate of 80 megabits per second while consuming just 53.6 microwatts, or 0.67 picojoules per bit.

The result represents the most energy-efficient reported high-speed link through the brain or body. The chip also reconstructed electrocorticography brain waveforms end to end with a correlation of 0.85 while occupying less than 0.004 square millimeters of active silicon area.

“Our Nature Electronics work showed the brain’s electro-quasistatic channel is like broadband, flat across frequency,” Sen said. “The new understanding is that it is also remarkably faithful in time. Once you see that the channel crushes amplitude but preserves timing, the answer is obvious in hindsight: stop sending information as voltage and start sending it as time, because measuring time is exactly what advanced chip technology does best. That confluence of channel physics, modulation and Moore’s law scaling is what buys a significant jump in efficiency, and it changes what is possible for high-bandwidth brain interfaces.”

Toward whole-brain-scale interfaces

Ultra-low-power, high-bandwidth communication through the body could have applications across neurotechnology.

Potential uses include speech and movement neuroprostheses that provide richer neural data to AI-based decoders, closed-loop neuromodulation systems for conditions such as Parkinson’s disease and epilepsy, networks of tiny distributed implants, and research tools capable of observing brain activity at scales that are difficult to achieve today.

The work also advances research associated with Purdue’s Center for Internet of Bodies, which Sen directs. The center is pursuing a vision of secure, energy-efficient electronics that can operate in, on and around the human body.

About the researchers

Harshit Naman received his bachelor’s degree in electronics and communication engineering from Birla Institute of Technology Mesra in India in 2022. He is pursuing a doctorate in electrical and computer engineering at Purdue University under Sen. His research focuses on analog and mixed-signal integrated circuits for in-sensor computing and energy-efficient communication systems for biomedical applications.

Shreyas Sen is a professor of electrical and computer engineering in Purdue University’s Elmore Family School of Electrical and Computer Engineering and director of the Center for Internet of Bodies. He invented electro-quasistatic human body communication, also known as “Body as a Wire” technology, and has authored more than 250 journal and conference papers. He directs Purdue’s SPARC Lab, where research includes mixed-signal circuits and systems for the Internet of Things, biomedical applications and security.