September 13, 2022

Apple is Hiring

Position Type: Research
Priority: No
Degree Requirement: BS, MS, PhD
Apple is Hiring
I graduated from Purdue in 2011. Currently, I work at Apple, CPU DFT team, located in Cupertino, CA. Our team is constantly hiring. So I thought I could ask around Purdue graduates. Anyone who has taken ECE559 circuit design, or has the same background can apply.  
We are looking for 1) interns in our group and prefer the students who will graduate soon after the internship. 2) for full time, we prefer NCG or RCG.
Attached/below is the job description.
Resumes can be sent to me,, and I will forward it to our managers.
Yixi Yang
2011 Graduate from Purdue ECE
DFT Engineer
Location: Santa Clara Valley, CA, USA
Description: Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a talented engineer to join our exciting team of problem solvers.
Job Summary: In this highly visible role, you will be at the center of a System On Chip design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Core Responsibilities: As a DFT engineer, you will have responsibilities spanning various aspects:
  • Developing and implementing DFT architecture
  • Working with designers to integrate DFT implementations and run various checks
  • Working with the DV team to verify DFT implementations and review verification coverage
  • Handling schedules and supporting cross-functional engineering effort
  • Working with test engineers to bring up test patterns on silicon
  • Working with rest of the team to document DFT specifications
  • Generating structural test patterns and analyzing and improving coverage
BS/MS in EE/CE is required
Qualifications: The ideal NCG candidate will have good GPA. Have at least taken digital logic design, analog design and embedded system graduate courses and has very good scripting skills and is proficient in Verilog.