Publications
Please visit this Google Scholar profile for the full list of publications.
2024
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ESWEEKSpecial Session: Neuro-Symbolic Architecture Meets Large Language Models: A Memory-Centric PerspectiveIn Embedded Systems Week (ESWEEK) 2024
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DOE Workshop
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DRCCMOS+ X Technologies for Neuro-Vector-Symbolic ComputingIn Device Research Conference (DRC) 2024
2023
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DACEmerging Hardware Technologies and 3D System Integration for Ubiquitous Machine IntelligenceIn ACM/IEEE Design Automation Conference (DAC) 2023
2022
2021
2020
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ISCATIMELY: Pushing Data Movements and Interfaces in PIM Accelerators Towards Local and in Time DomainIn IEEE/ACM International Symposium on Computer Architecture (ISCA) 2020
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Book ChapterHyperdimensional computing nanosystem: in-memory computing using monolithic 3D integration of RRAM and CNFET2020
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SISPADMonte Carlo Simulation of a Three-Terminal RRAM with Applications to Neuromorphic ComputingIn International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2020
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Book ChapterHeterogeneous 3D nano-systems: The N3XT approach?2020
2019
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TEDNext-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part II: Design Guidelines for Device, Array, and ArchitectureIEEE Transactions on Electron Devices (TED) 2019
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TEDNext-generation ultrahigh-density 3-D vertical resistive switching memory (VRSM)—Part I: Accurate and computationally efficient modelingIEEE Transactions on Electron Devices (TED) 2019
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Nat. Electron.Ternary content-addressable memory with MoS2 transistors for massively parallel data searchNature Electronics 2019
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ISSCCA 43pJ/Cycle Non-Volatile Microcontroller with 4.7 μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience TechniquesIn IEEE International Solid-State Circuits Conference (ISSCC) 2019
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JPhys-DDevice and materials requirements for neuromorphic computingJournal of Physics D: Applied Physics (JPhys-D) 2019
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Review
2018
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IEDMFirst Principles Study of Memory Selectors using Heterojunctions of 2D Layered MaterialsIn IEEE International Electron Devices Meeting (IEDM) 2018
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JSSCHyperdimensional computing exploiting carbon nanotube FETs, resistive RAM, and their monolithic 3D integrationIEEE Journal of Solid-State Circuits (JSSC) 2018
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Nat. Electron.Electronic synapses made of layered two-dimensional materialsNature Electronics 2018
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ISSCCBrain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case studyIn IEEE International Solid-State Circuits Conference (ISSCC) 2018
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VLSISelector Requirements for Tera-Bit Ultra-High-Density 3D Vertical RRAMIn Symposium on VLSI Technology (VLSI) 2018
2017
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IEDM2D molybdenum disulfide (MoS2) transistors driving RRAMs with 1T1R configurationIn IEEE International Electron Devices Meeting (IEDM) 2017
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TEDDevice and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM ArraysIEEE Transactions on Electron Devices (TED) 2017
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VLSI-TSADevice-architecture co-design for hyperdimensional computing with 3d vertical resistive switching random access memory (3D VRRAM)In VLSI Technology, Systems and Application (VLSI-TSA) 2017
2016
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ICSICTDesign and application of resistive switching devices for novel computing/memory architecturesIn IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) 2016
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J-EDSDesign and Application of Oxide-Based Resistive Switching Devices for Novel Computing ArchitecturesIEEE Journal of the Electron Devices Society (J-EDS) 2016
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VLSIFour-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processingIn Symposium on VLSI Technology (VLSI) 2016
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NanotechnologyDisturbance characteristics of half-selected cells in a cross-point resistive switching memory arrayNanotechnology 2016
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TEDModeling and Optimization of Bilayered TaOₓ RRAM Based on Defect Evolution and Phase Transition EffectsIEEE Transactions on Electron Devices (TED) 2016
2015
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IEDMOptimized learning scheme for grayscale image recognition in a RRAM based analog neuromorphic systemIn IEEE International Electron Devices Meeting (IEDM) 2015
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IEDMOxide-based RRAM: Requirements and challenges of modeling and simulationIn IEEE International Electron Devices Meeting (IEDM) 2015
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EDLNonvolatile Logic and In Situ Data Transfer Demonstrated in Crossbar Resistive RAM ArrayIEEE Electron Device Letters (EDL) 2015
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TED3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization GuidelinesIEEE Transactions on Electron Devices (TED) 2015
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Sci. Rep.A learnable parallel processing architecture towards unity of memory and computingScientific Reports 2015
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SISPADSimulation of TaOx-RRAM with Ta2O5-x/TaO2-x stack engineeringIn International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2015
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IPFAReliability simulation of TMO RRAMIn IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) 2015
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VLSI-TSAInsights into resistive switching characteristics of TaOx-RRAM by Monte-Carlo simulationIn VLSI Technology, Systems and Application (VLSI-TSA) 2015
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ASP-DACModeling and design optimization of ReRAMIn Asia and South Pacific Design Automation Conference (ASP-DAC) 2015
2014
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IRPSWrite disturb analyses on half-selected cells of cross-point RRAM arraysIn IEEE International Reliability Physics Symposium (IRPS) 2014
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IMWStatistical assessment methodology for the design and optimization of cross-point RRAM arraysIn IEEE International Memory Workshop (IMW) 2014
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VLSI-TSAImpact of pulse rise time on programming of cross-point RRAM arraysIn VLSI Technology, Systems and Application (VLSI-TSA) 2014
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ICSICTA comprehensive speed-power analysis of resistive switching memory arrays with selection devicesIn iscict 2014
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ESSDERCParameters extraction on HfOx based RRAMIn European Solid State Device Research Conference (ESSDERC) 2014
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T-NANOAnalysis of the voltage-time dilemma of metal oxide-based RRAM and solution exploration of high speed and low voltage AC switchingIEEE Transactions on Nanotechnology 2014
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VLSITowards high-speed, write-disturb tolerant 3D vertical RRAM arraysIn Symposium on VLSI Technology (VLSI) 2014
2013
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TEDA physics-based compact model of metal-oxide-based RRAM DC and AC operationsIEEE Transactions on Electron Devices (TED) 2013