Publications

Please visit this Google Scholar profile for the full list of publications.

2024

  1. ESWEEK
    Special Session: Neuro-Symbolic Architecture Meets Large Language Models: A Memory-Centric Perspective
    Mohamed Ibrahim, Zishen Wan, Haitong Li, Priyadarshini Panda, Tushar Krishna, Pentti Kanerva, Yiran Chen, and Arijit Raychowdhury
    In Embedded Systems Week (ESWEEK) 2024
  2. DOE Workshop
    Analog/Hybrid Co-Design Flow Methodology
    Benjamin Parpillon, Amit Trivedi, Haitong Li, Jennifer Hasler, and Farah Fahim
    In Analog Computing for Science Workshop 2024
  3. DRC
    CMOS+ X Technologies for Neuro-Vector-Symbolic Computing
    Luqi Zheng, and Haitong Li
    In Device Research Conference (DRC) 2024

2023

  1. DAC
    Emerging Hardware Technologies and 3D System Integration for Ubiquitous Machine Intelligence
    Haitong Li
    In ACM/IEEE Design Automation Conference (DAC) 2023

2022

  1. Dissertation
    RRAM-CMOS integrated hardware for efficient learning and inference at the edge
    Haitong Li
    2022

2021

  1. TED
    Sapiens: A 64-kb RRAM-based non-volatile associative memory for one-shot learning and inference at the edge
    Haitong Li, Wei-Chen Chen, Akash Levy, Ching-Hua Wang, Hongjie Wang, Po-Han Chen, Weier Wan, Win-San Khwa, Harry Chuang, Y-D Chih, Meng-Fan Chang, H.-S. Philip Wong, and Priyanka Raina
    IEEE Transactions on Electron Devices (TED) 2021
  2. VLSI
    One-shot learning with memory-augmented neural networks using a 64-kbit, 118 GOPS/W RRAM-based non-volatile associative memory
    Haitong Li, Wei-Chen Chen, Akash Levy, Ching-Hua Wang, Hongjie Wang, Po-Han Chen, Weier Wan, H.-S. Philip Wong, and Priyanka Raina
    In Symposium on VLSI Technology (VLSI) 2021

2020

  1. ISCA
    TIMELY: Pushing Data Movements and Interfaces in PIM Accelerators Towards Local and in Time Domain
    Weitao Li, Pengfei Xu, Yang Zhao, Haitong Li, Yuan Xie, and Yingyan Lin
    In IEEE/ACM International Symposium on Computer Architecture (ISCA) 2020
  2. Book Chapter
    Hyperdimensional computing nanosystem: in-memory computing using monolithic 3D integration of RRAM and CNFET
    Abbas Rahimi, Tony F Wu, Haitong Li, Jan M Rabaey, H.-S. Philip Wong, Max M Shulaker, and Subhasish Mitra
    2020
  3. SISPAD
    Monte Carlo Simulation of a Three-Terminal RRAM with Applications to Neuromorphic Computing
    Akhilesh Balasingam, Akash Levy, Haitong Li, and Priyanka Raina
    In International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2020
  4. Book Chapter
    Heterogeneous 3D nano-systems: The N3XT approach?
    Dennis Rich, Andrew Bartolo, Carlo Gilardo, Binh Le, Haitong Li, Rebecca Park, Robert M Radway, Mohamed M Sabry Aly, H.-S. Philip Wong, and Subhasish Mitra
    2020

2019

  1. TED
    Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part II: Design Guidelines for Device, Array, and Architecture
    Zizhen Jiang, Shengjun Qin, Haitong Li, Shosuke Fujii, Dongjin Lee, Simon Wong, and H.-S. Philip Wong
    IEEE Transactions on Electron Devices (TED) 2019
  2. TED
    Next-generation ultrahigh-density 3-D vertical resistive switching memory (VRSM)—Part I: Accurate and computationally efficient modeling
    Shengjun Qin, Zizhen Jiang, Haitong Li, Shosuke Fujii, Dongjin Lee, S Simon Wong, and H.-S. Philip Wong
    IEEE Transactions on Electron Devices (TED) 2019
  3. SPIE
    Neuro-inspired computing with emerging memories: where device physics meets learning algorithms
    Haitong Li, Priyanka Raina, and H.-S. Philip Wong
    In Spintronics XII 2019
  4. DAC
    On-Chip Memory Technology Design Space Explorations for Mobile Deep Neural Network Accelerators
    Haitong Li, Mudit Bhargava, Paul N Whatmough, and H.-S. Philip Wong
    In ACM/IEEE Design Automation Conference (DAC) 2019
  5. Nat. Electron.
    Ternary content-addressable memory with MoS2 transistors for massively parallel data search
    Rui Yang, Haitong Li, Kirby KH Smithe, Taeho R Kim, Kye Okabe, Eric Pop, Jonathan A Fan, and H.-S. Philip Wong
    Nature Electronics 2019
  6. ISSCC
    A 43pJ/Cycle Non-Volatile Microcontroller with 4.7 μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques
    Tony F Wu, Binh Q Le, Robert Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary K Wootters, H.-S. Philip Wong, Mohamed M Sabry Aly, Edith Beigne, and Subhasish Mitra
    In IEEE International Solid-State Circuits Conference (ISSCC) 2019
  7. JPhys-D
    Device and materials requirements for neuromorphic computing
    Raisul Islam, Haitong Li, Pai-Yu Chen, Weier Wan, Hong-Yu Chen, Bin Gao, Huaqiang Wu, Shimeng Yu, Krishna Saraswat, and HS Philip Wong
    Journal of Physics D: Applied Physics (JPhys-D) 2019
  8. Review
    Recommended methods to study resistive switching devices
    Mario Lanza, H.-S. Philip Wong, Eric Pop, Daniele Ielmini, Dimitri Strukov, Brian C Regan, Luca Larcher, Marco A Villena, J Joshua Yang, Ludovic Goux, Attilio Belmonte, Yuchao Yang, Francesco M Puglisi, Jinfeng Kang, Blanka Magyari‐Köpe, Eilam Yalon, Anthony Kenyon, Mark Buckwell, Adnan Mehonic, Alexander Shluger, Haitong Li, Tuo‐Hung Hou, Boris Hudec, Deji Akinwande, and  others
    Advanced Electronic Materials 2019

2018

  1. IEDM
    First Principles Study of Memory Selectors using Heterojunctions of 2D Layered Materials
    Linsen Li, Blanka Magyari-Köpe, Ching-Hua Wang, Sanchit Deshmukh, Zizhen Jiang, Haitong Li, Yi Yang, Huanglong Li, He Tian, E Pop, Tian-Ling Ren, and H.-S. Philip Wong
    In IEEE International Electron Devices Meeting (IEDM) 2018
  2. JSSC
    Hyperdimensional computing exploiting carbon nanotube FETs, resistive RAM, and their monolithic 3D integration
    Tony F Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Gage Hills, Bryce Hodson, William Hwang, Jan M Rabaey, H.-S. Philip Wong, Max M Shulaker, and  others
    IEEE Journal of Solid-State Circuits (JSSC) 2018
  3. Nat. Electron.
    Electronic synapses made of layered two-dimensional materials
    Yuanyuan Shi, Xianhu Liang, Bin Yuan, Victoria Chen, Haitong Li, Fei Hui, Zhouchangwan Yu, Fang Yuan, Eric Pop, H.-S. Philip Wong, and Mario Lanza
    Nature Electronics 2018
  4. ISSCC
    Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study
    Tony F Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Jan M Rabaey, H.-S. Philip Wong, Max M Shulaker, and Subhasish Mitra
    In IEEE International Solid-State Circuits Conference (ISSCC) 2018
  5. VLSI
    Selector Requirements for Tera-Bit Ultra-High-Density 3D Vertical RRAM
    Zizhen Jiang, Shengjun Qin, Haitong Li, Shosuke Fujii, Dongjin Lee, Simon Wong, and H.-S. Philip Wong
    In Symposium on VLSI Technology (VLSI) 2018

2017

  1. IEDM
    2D molybdenum disulfide (MoS2) transistors driving RRAMs with 1T1R configuration
    Rui Yang, Haitong Li, Kirby KH Smithe, Taeho R Kim, Kye Okabe, Eric Pop, Jonathan A Fan, and H.-S. Philip Wong
    In IEEE International Electron Devices Meeting (IEDM) 2017
  2. TED
    Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays
    Haitong Li, Peng Huang, Bin Gao, Xiaoyan Liu, Jinfeng Kang, and H.-S. Philip Wong
    IEEE Transactions on Electron Devices (TED) 2017
  3. TCAS-I
    Resistive RAM-Centric Computing: Design and Modeling Methodology
    Haitong Li, Tony F Wu, Subhasish Mitra, and H.-S. Philip Wong
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) 2017
  4. VLSI-TSA
    Device-architecture co-design for hyperdimensional computing with 3d vertical resistive switching random access memory (3D VRRAM)
    Haitong Li, Tony F. Wu, Subhasish Mitra,  Wong, and H.-S. Philip
    In VLSI Technology, Systems and Application (VLSI-TSA) 2017

2016

  1. IEDM
    Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition
    Haitong Li, Tony F Wu, Abbas Rahimi, Kai-Shin Li, Miles Rusch, Chang-Hsien Lin, Juo-Luen Hsu, Mohamed M Sabry, S Burc Eryilmaz, Joon Sohn, and  others
    In IEEE International Electron Devices Meeting (IEDM) 2016
  2. ICSICT
    Design and application of resistive switching devices for novel computing/memory architectures
    Jinfeng Kang, Peng Huang, Haitong Li, Bin Gao, Yudi Zhao, Runze Han, Zheng Zhou, Zhe Chen, Chen Liu, Lifeng Liu, and Xiaoyan Liu
    In IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) 2016
  3. J-EDS
    Design and Application of Oxide-Based Resistive Switching Devices for Novel Computing Architectures
    Jinfeng Kang, Peng Huang, Bin Gao, Haitong Li, Zhe Chen, Yudi Zhao, Chen Liu, Lifeng Liu, and Xiaoyan Liu
    IEEE Journal of the Electron Devices Society (J-EDS) 2016
  4. VLSI
    Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing
    Haitong Li, Kai-Shin Li, Chang-Hsien Lin, Juo-Luen Hsu, Wen-Cheng Chiu, Min-Cheng Chen, Tsung-Ta Wu, Joon Sohn, S. Burc Eryilmaz, Jia-Min Shieh, Wen-Kuan Yeh, and H.-S. Philip Wong
    In Symposium on VLSI Technology (VLSI) 2016
  5. Nanotechnology
    Disturbance characteristics of half-selected cells in a cross-point resistive switching memory array
    Zhe Chen, Haitong Li, Hong-Yu Chen, Bing Chen, Rui Liu, Peng Huang, Feifei Zhang, Zizhen Jiang, Hongfei Ye, Bin Gao, and  others
    Nanotechnology 2016
  6. TED
    Modeling and Optimization of Bilayered TaOₓ RRAM Based on Defect Evolution and Phase Transition Effects
    Yudi Zhao, Peng Huang, Zhe Chen, Chen Liu, Haitong Li, Bing Chen, Wenjia Ma, Feifei Zhang, Bin Gao, Xiaoyan Liu, and Jinfeng Kang
    IEEE Transactions on Electron Devices (TED) 2016

2015

  1. IEDM
    Optimized learning scheme for grayscale image recognition in a RRAM based analog neuromorphic system
    Zhe Chen, Bin Gao, Zheng Zhou, Peng Huang, Haitong Li, Wenjia Ma, Dongbin Zhu, Lifeng Liu, Xiaoyan Liu, Jinfeng Kang, and Hong-Yu Chen
    In IEEE International Electron Devices Meeting (IEDM) 2015
  2. IEDM
    Oxide-based RRAM: Requirements and challenges of modeling and simulation
    Jinfeng Kang, Bin Gao, Peng Huang, Haitong Li, Yudi Zhao, Zhe Chen, Chen Liu, Lifeng Liu, and Xiaoyan Liu
    In IEEE International Electron Devices Meeting (IEDM) 2015
  3. EDL
    Nonvolatile Logic and In Situ Data Transfer Demonstrated in Crossbar Resistive RAM Array
    Haitong Li, Zhe Chen, Wenjia Ma, Bin Gao, Peng Huang, Lifeng Liu, Xiaoyan Liu, and Jinfeng Kang
    IEEE Electron Device Letters (EDL) 2015
  4. TED
    3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization Guidelines
    Haitong Li, Bin Gao, Hong-Yu Henry Chen, Zhe Chen, Peng Huang, Rui Liu, Liang Zhao, Zizhen Jane Jiang, Lifeng Liu, Xiaoyan Liu, Shimeng Yu, Jinfeng Kang, Yoshi Nishi, and H.-S. Philip Wong
    IEEE Transactions on Electron Devices (TED) 2015
  5. Sci. Rep.
    A learnable parallel processing architecture towards unity of memory and computing
    Haitong Li, Bin Gao, Zhe Chen, Yudi Zhao, Peng Huang, Hongfei Ye, Lifeng Liu, Xiaoyan Liu, and Jinfeng Kang
    Scientific Reports 2015
  6. SISPAD
    Simulation of TaOx-RRAM with Ta2O5-x/TaO2-x stack engineering
    Yudi Zhao, Peng Huang, Zhe Chen, Chen Liu, Haitong Li, Wenjia Ma, Bin Gao, Xiaoyan Liu, and Jinfeng Kang
    In International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2015
  7. IPFA
    Reliability simulation of TMO RRAM
    Xiaoyan Liu, Peng Huang, Bin Gao, Haitong Li, Yudi Zhao, and Jinfeng Kang
    In IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) 2015
  8. VLSI-TSA
    Insights into resistive switching characteristics of TaOx-RRAM by Monte-Carlo simulation
    Yudi Zhao, Peng Huang, Zhe Chen, Chen Liu, Haitong Li, Bing Chen, Wenjia Ma, Feifei Zhang, Bin Gao, Xiaoyan Liu, and Jinfeng Kang
    In VLSI Technology, Systems and Application (VLSI-TSA) 2015
  9. DATE
    Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model
    Haitong Li, Zizhen Jiang, Peng Huang, Yi Wu, Hong-Yu Chen, Bin Gao, Xiaoyan Liu, Jinfeng Kang, and H.-S. Philip Wong
    In Design, Automation & Test in Europe (DATE) 2015
  10. ASP-DAC
    Modeling and design optimization of ReRAM
    J. Kang, H. Li, P. Huang, Z. Chen, B. Gao, X. Liu, Z. Jiang, and H.-S. P. Wong
    In Asia and South Pacific Design Automation Conference (ASP-DAC) 2015

2014

  1. IRPS
    Write disturb analyses on half-selected cells of cross-point RRAM arrays
    Haitong Li, Hong-Yu Chen, Zhe Chen, Bing Chen, Rui Liu, Gang Qiu, Peng Huang, Feifei Zhang, Zizhen Jiang, Bin Gao, Lifeng Liu, Xiaoyan Liu, Shimeng Yu, H.-S. Philip Wong, and Jinfeng Kang
    In IEEE International Reliability Physics Symposium (IRPS) 2014
  2. IMW
    Statistical assessment methodology for the design and optimization of cross-point RRAM arrays
    Haitong Li, Zizhen Jiang, Peng Huang, Hong-Yu Chenl, Bing Chen, Rui Liu, Zhe Chen, Feifei Zhang, Lifeng Liu, Bin Gao, Xiaoyan Liu, Shimeng Yu, H.-S. Philip Wong, and Jinfeng Kang
    In IEEE International Memory Workshop (IMW) 2014
  3. VLSI-TSA
    Impact of pulse rise time on programming of cross-point RRAM arrays
    Rui Liu, Hong-Yu Chen, Haitong Li, Peng Huang, Liang Zhao, Zhe Chen, Feifei Zhang, Bing Chen, Lifeng Liu, Xiaoyan Liu, Bin Gao, Shimeng Yu, Yoshio Nishi, H.-S. Philip Wong, and Jinfeng Kang
    In VLSI Technology, Systems and Application (VLSI-TSA) 2014
  4. EDL
    A SPICE model of resistive random access memory for large-scale memory array simulation
    Haitong Li, Peng Huang, Bin Gao, Bing Chen, Xiaoyan Liu, and Jinfeng Kang
    IEEE Electron Device Letters (EDL) 2014
  5. ICSICT
    A comprehensive speed-power analysis of resistive switching memory arrays with selection devices
    Haitong Li, Peng Huang, Zhe Chen, Bing Chen, Bin Gao, Lifeng Liu, Xiaoyan Liu, and Jinfeng Kang
    In iscict 2014
  6. ESSDERC
    Parameters extraction on HfOx based RRAM
    P. Huang, B. Chen, H. Li, Z. Chen, B. Gao, X. Liu, and J. Kang
    In European Solid State Device Research Conference (ESSDERC) 2014
  7. T-NANO
    Analysis of the voltage-time dilemma of metal oxide-based RRAM and solution exploration of high speed and low voltage AC switching
    Peng Huang, Yijiao Wang, Haitong Li, Bin Gao, Bing Chen, Feifei Zhang, Lang Zeng, Gang Du, Jinfeng Kang, and Xiaoyan Liu
    IEEE Transactions on Nanotechnology 2014
  8. VLSI
    Towards high-speed, write-disturb tolerant 3D vertical RRAM arrays
    Hong-Yu Chen, Bin Gao, Haitong Li, Rui Liu, Peng Huang, Zhe Chen, Bing Chen, Feifei Zhang, Liang Zhao, Zizhen Jiang, Lifeng Liu, Xiaoyan Liu, Jinfeng Kang, Shimeng Yu, Yoshio Nishi, and H.-S. Philip Wong
    In Symposium on VLSI Technology (VLSI) 2014

2013

  1. TED
    A physics-based compact model of metal-oxide-based RRAM DC and AC operations
    Peng Huang, Xiaoyan Liu, Bing Chen, Haitong Li, Yi Jiao Wang, Ye Xin Deng, Kang Liang Wei, Lang Zeng, Bin Gao, Gang Du, Xing Zhang, and Jinfeng Kang
    IEEE Transactions on Electron Devices (TED) 2013