Abhijeet Paul

Top-of-the-Barrier Model

Validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Abhijeet Paul, Saumitra Mehrotra, Gerhard Klimeck and Mathieu Luisier


  • Find valid device regime for Top of the barrier (ToB) model.
  • Determine the factors that decide this regime.


[a]Self-Consistent Scheme
[b]Flowchart of procedure


  • 2D ToB a very reliable device model :
  • For longer channel length device.
  • Less compute time and lower memory requirements compared to 3D model.
  • Results presented in the 13th IWCE conference, 2009, at Beijing [P109].


ID-VG from 2D ToB (with DIBL)matches quite well with 3D OMEN result for [100] wire with Lc = 15nm and W = H = 3nm.
2D ToB simulation time is less compared to 3D. Speedup is very rapid for larger cross-section devices.
  • Two Conditions must for 2D ToB to match 3D result:
  • Presence of source-channel barrier(>KT)
  • Very less S/D tunneling => long Lc devices
  • Lc>=(5 *wire diameter) good device regime for ToB model.

Powerpoint slide as ppt, pdf, or as image below.