Saumitra Mehrotra

On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs

On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Saumitra Raj Mehrotra & Gerhard Klimeck

Objective:

  • Find valid device regime for Top of the Barrier (ToB) model simulations by comparing with 3D results using OMEN.
  • Determine the factors that determine this regime.

Results:

  • ToB model imitates 3D simulation results
    Lc/W >= 3. S-D tunneling in SS regime
    causes difference at shorter Lc.
  • Time gain of 100X achieved using ToB
    model.

Impact:

  • Results published in IWCE (China, May
    2009).

 

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Saumitra Mehrotra's Pages

Biography Development of Nanowire code on nanoHUB Development of simulation tools for semiconductor course work Performance of Trigated Silicon Nanowire pMOSFETs: Surface and Orientation dependence On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Effect of biaxial+uniaxial compressive strain on SiGe /Si hole bandstructure and pMOSFET Atomistic approach to alloy scattering in SiGe Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering Benchmarking of bulk SiGe and strained SiGe/(100)Si bandstructure using Tight-binding VCA model Ballistic hole injection velocity analysis in Ge UTB pMOSFETs Engineering nanowire n-MOSFETs at Lg < 8nm Atomistic simulation of phonon and alloy limited hole mobility in Si1-xGex nanowires Simulation Study of Thin-Body Ballistic n-MOSFET Involving Transport in Mixed Γ-L valleys Effect of Fin Tapering in Nanoscale Si FinFETs