Journals (13)
"Optimal Ge/SiGe nanofin geometries for hole mobility enhancement: Technology limit from atomic simulations"
J. Appl. Phys. 117, 174312 (2015);doi:10.1063/1.49190912015Not Cited Yet
0
0
"Design Guidelines for Sub-12 nm Nanowire MOSFETs"
IEEE Transactions on Nanotechnology, vol. 14, Issue: 2, Page(s): 210 - 213, March 2015;doi: 10.1109/TNANO.2015.239544120150
15
"Effect of Diameter Variation on Electrical Characteristics of Schottky Barrier Indium Arsenide Nanowire Field Effect Transistors"
ACS Nano, Publication Date (Web): 21 May 2014;doi: 10.1021/nn501756720140
3
"Atomistic simulation of phonon and alloy limited hole mobility in Si1-xGex nanowires"
Phys. Status Solidi RRL 7, No. 10, 903–906 (2013) 20130
3
"Engineering Nanowire n-MOSFETs at Lg < 8nm"
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 60, Issue: 7, Page(s): 2171 - 2177, July 2013;doi: 10.1109/TED.2013.22638062013Not Cited Yet
0
0
"Simulation Study of Thin-Body Ballistic n-MOSFET Involving Transport in Mixed Γ-L valleys"
IEEE Electron Device Letters, vol.34, Issue: 9, Page(s): 1196 - 1198, Sept. 2013;doi: 10.1109/LED.2013.22730722013Not Cited Yet
0
0
"Utilizing the Unique Properties of Nanowire MOSFETs for RF Applications"
Nano Lett., March 6, 2013 (Communication);doi:10.1021/nl304707820130
7
"Observation of 1D Behavior in Si Nanowires: Towards High-Performance TFETs"
Nano Lett., 2012, 12 (11), pp 5571–5575;doi:10.1021/nl30256642012Not Cited Yet
0
0
"Atomistic Approach to Alloy Scattering in Si(1-x)Ge(x)"
Appl. Phys. Lett. 98, 173503 (2011), Online Publication Date: 26 April 2011;doi : 10.1063/1.35839832011Cited by 7 / 61 Downloads
61
7
"Interface trap density metrology from sub-threshold transport in highly scaled undoped Si n-FinFETs"
Journal of Applied Physics. 110, 121301 (2011), 22 December 2011;doi:10.1063/1.36606972011Cited by 4 / 56 Downloads
56
4
"Interface Trap Density Metrology of state-of-the-art undoped Si n-FinFETs"
Electron Device Letters. 32,4 (2011);doi : 10.1109/LED.2011.21061502011Cited by 7 / 24 Downloads
24
7
"Performance Prediction of Ultra-scaled SiGe/Si Core/Shell Electron and Hole Nanowire MOSFETs"
IEEE Electron Device Letters, Vol. 31, Issue: 4, Page(s): 278-280, April 2010;doi:10.1109/LED.2010.20405772010Not Cited Yet / 5 Downloads
5
0
"Design concepts of terahertz quantum cascade lasers: Proposal for terahertz laser efficiency improvements"
Appl. Phys. Lett. 97, 261106 (2010);doi:10.1063/1.35241972010Cited by 23 / 51 Downloads
51
23
Proceedings (13)
"Tunneling: The Major Issue in Ultra-scaled MOSFETs"
IEEE Nano, Rome, Italy, July 26-30, 2015, Pages: 670 - 673;doi:10.1109/NANO.2015.73886942015Not Cited Yet
0
0
"Record-Performance Thermally-Limited Devices, Prospects for High-On-Current Steep Subthreshold Swing Devices"
2015 Conference on Indium Phosphide and Related Matrerials, June 8-July 2, Santa Barbara, CA2015Not Cited Yet
0
0
"Transistors for VLSI, for Wireless: A View Forwards Through Fog"
73rd Device Research Conference (DRC), Ohio State University,June 21-24, 20152015Not Cited Yet
0
0
"Effect of Fin Tapering in Nanoscale Si FinFETs"
16th International Workshop on Computational Electronics, Nara, Japan June 4-7, 20132013Not Cited Yet
0
0
"Atomistic Analalysis of Electrical Performance of Highly Scaled Si1-xGex p-FinFETs"
SISPAD 2012, International Conference on Simulation of Semiconductor Processes and Devices, Denver, CO, Sept. 20122012Not Cited Yet
0
0
"Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering"
proceedings of the IEEE Device Research Conference (DRC), June 20-22 2011;doi:10.1109/DRC.2011.599451120110
2
"Effects of Interface Roughness Scattering on RF Performance of Nanowire Transistors"
International Semiconductor Device Research Symposium (ISDRS 2011), Dec 7-11, Univ of Maryland;doi:10.1109/ISDRS.2011.61352992011Not Cited Yet
0
0
"Ballistic hole injection velocity analysis in Ge UTB pMOSFETs: Dependence on body thickness, orientation and strain"
International Semiconductor Device Research Symposium (ISDRS 2011), Dec 7-11, Univ of Maryland;doi:10.1109/ISDRS.2011.61353722011Not Cited Yet
0
0
"Enhancement of thermoelectric efficiency by uniaxial tensile stress in n-type GaAs nanowires"
proceedings of IEEE nano conference, Portland, Aug, 2011.;doi:978-1-4577-1515-02011Not Cited Yet
0
0
"On the validity of the top of the barrier quantum transport model for ballistic nanowire MOSFETs"
to appear in IEEE proceedings of the 13th International Workshop on Computational Electronics, Tsinghua University, Beijing, May 27-29 2009.Page(s):1-4;doi:10.1109/IWCE.2009.509113420090
16
"Atomistic simulations for SiGe pMOS devices Bandstructure to Transport"
ISDRS 2009, December 9-11, 2009, College Park, MD, USA. Page(s):1-2;doi:10.1109/ISDRS.2009.537806520090
1
"Study of Ultra-scaled SiGe/Si Core/Shell Nanowire FETs for CMOS Applications"
ISDRS 2009, December 9-11, 2009, College Park, MD, USA. Page(s):1-2;doi:10.1109/ISDRS.2009.537800320090
1
"Surface and Orientation dependence on performance of Trigated Silicon Nanowire pMOSFETs"
proceedings of 7th IEEE Workshop on Microelectronics and Electron Devices (WMED 2009), Apr 03, 2009.Page(s):1-4;doi:10.1109/WMED.2009.481614520090
3
Conferences (35)
"Transistors for VLSI, for Wireless: A View Forwards Through Fog"
73rd Device Research Conference (DRC), Ohio State University,June 21-24, 201520150
0
"Tunneling: The Major Issue in Ultra-scaled MOSFETs"
IEEE Nano, Rome, Italy, July 26-30, 201520150
0
"Development of the NEMO Tool Suite From Basic Physics to Real Devices and to Global Impact on nanoHUB.org"
Arizona State, Electrical Engineering Advanced Semiconductor Device Class, Host: Prof. Dragica Vasileska, April 20, 201520150
0
"NEMO5, a Parallel, Multiscale, Multiphysics Nanoelectronics Modeling Tool"
Synopsys, Oct 18, 2013, Host: Dr. Victor Moroz20130
0
"Development of the NEMO Tool Suite From Basic Physics to Real Devices and to Global Impact on nanoHUB.org"
Embedded tutorial on FinFET: A Multifaceted Perspective for CAD Engineers , International Conference on Computer Aided Design, Nov 18-21, 2013, San Jose, CA20130
0
"PMOS FinFETs Enhanced through Transport in SiGe Cladding"
submitted to IEDM2013.20130
0
"Atomistic Modeling of CBRAM Switching Behavior"
2013 FAME (Function Accelerated nanoMaterial Engineering) Annual Review, poster presentation, Oct. 15 & 16, 2013, Los Angeles, CA20130
0
"What is different below 10 nm?"
Invited presentation at the NNIN Symposium on Frontiers in Nanoscale Transistors and Electronics, Santa Barbara, CA, February 6, 2012.20120
0
"Atomistic Analysis of Electrical Performance of Highly Scaled Si1-xGex p-FinFETs"
SISPAD 2012, International Conference on Simulation of Semiconductor Processes and Devices, Denver, CO, Sept. 201220120
0
"Theoretical prediction of performance enhancements in asymmetric strain relaxed Ge-PMOS nanowires"
MRS Fall Meeting 2012, Boston, Massachussets, November 25 - 30, 201220120
0
"Design of high-current L-valley GaAs/AlAs0:56Sb0:44/InP (111) ultra-thin-body nMOSFETs"
International Conference on Indium Phosphide and Related Materials, University of California at Santa Barbara, Aug 27-30 201220120
0
"Modelling of Ge/InGaAs FinFETs"
MSD Annual Review , MIT (Boston) MA, May 1-2 201220120
0
"MOSFETs near end of the roadmap "
MSD Annual Review , MIT (Boston) MA, May 1-2 2012 20120
0
"Double Gate Ge p-FinFET Performance: Dependence on Orientation, Strain and Fin Width Thickness"
TECHCON 2012, Austin TX,Sept 10-11 201220120
0
"Introduction to nanoHUB.org – online simulation and more"
Tutorial at IEEE nano conference, Portland, Aug, 2011.20110
0
"Enhancement of thermoelectric efficiency by uniaxial tensile stress in n-type GaAs nanowires"
2011 IEEE Nanotechnology Conference, Portland, Oregon, USA, Aug 15-18, 2011;doi:10.1109/NANO.2011.614452520110
0
"Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering"
Device Research Conference, 2011, 20-22 June 2011;doi:10.1109/DRC.2011.599451120110
0
"Role of alloy scattering in strained SiGe nano MOSFET"
MSD, FCRP Annual Review, Student Poster, MIT, Boston, MA, May 10-11, 201120110
0
"Effects of Interface Roughness Scattering on RF Performance of Nanowire Transistors"
International Semiconductor Device Research Symposium (ISDRS 2011), Dec 7-11, Univ of Maryland;doi:10.1109/ISDRS.2011.613529920110
0
"Ballistic hole injection velocity analysis in Ge UTB pMOSFETs: Dependence on body thickness, orientation and strain"
2011 International Semiconductor Device Research Symposium (ISDRS 2011), Dec 7-11, Univ of Maryland20110
0
"Tight-binding based alloy scattering calculations in Si$_{1-x}$Ge$_{x}$"
APS March Meeting, Dallas, Texas, March 23, 2011.20110
0
"nanoHUB.org – The ABACUS Tool Suite as a Framework for Semiconductor Education Courses"
2011 IEEE Nanotechnology Conference, Portland, Oregon,USA Aug 15-18;doi:10.1109/NANO.2011.614458120110
0
"Atomistic approach to study charge and current distribution in ultra-scaled SiGe/Si core/shell nanowire FETs"
American Physical Society, March Meeting, March 15–19, 2010; Portland, Oregon (2010)20100
0
"Fullband Study of Ultra-Scaled Electron and Hole SiGe Nanowire FETs"
Microelectronics and Electron Devices (WMED), 2010 IEEE Workshop on, Page(s): 1 - 4; doi: 10.1109/WMED.2010.545375620100
0
"A Tight-Binding approach for SiGe Bandstructure Calculations"
TECHCON, Austin, Texas ,Sept. 13-14,201020100
0
"Strain Engineering of Trigated Silicon Nanowire FinFETs for Improved Device Performance"
TECHCON, Austin, Texas,Sept. 13-14, 201020100
0
"Modeling of SiGe material for ultra-scaled CMOS device applications"
MSD, FCRP Annual Review, Student Poster, MIT, Boston, MA, May 5-6, 201020100
0
"On the validity of the top of the barrier quantum transport model for ballistic nanowire MOSFETs"
13th International Workshop on Computational Electronics, Tsinghua University, Beijing, May 27-29 2009;doi: 10.1109/IWCE.2009.5091134200920
0
"Surface and Orientation dependence on performance of Trigated Silicon Nanowire pMOSFETs"
7th IEEE Workshop on Microelectronics and Electron Devices (WMED 2009), Apr 03, 2009, Boise Center on the Grove Boise, Idaho United States 20090
0
"Atomistic simulations for SiGe pMOS devices Bandstructure to Transport"
ISDRS 2009, December 9-11, 2009, College Park, MD, USA. 20095
0
"Study of Ultra-scaled SiGe/Si Core/Shell Nanowire FETs for CMOS Applications"
ISDRS 2009, December 9-11, 2009, College Park, MD, USA. 200917
0
"On the Validity of Top of the Barrier Quantum Transport Model for Ballistic Nanowire MOSFETs"
TECHCON 2009 to be held at the Renaissance Hotel in Austin, Texas, September 14 - 15, 2009;doi:10.1109/IWCE.2009.509113420090
0
"Study of Electronic Charge Distribution in Silicon Nanowire Transistors: An Atomistic Approach"
American Physical Society, March Meeting, March 16-20, Pittsburgh, PA, 2009.20090
0
"Development and Enhancement of Nanowire on nanoHUB.org"
MSD, FCRP Annual Review, Student Poster, MIT, Boston, MA, May 8, 2008.20080
0
"Nanowire Simulations from atomistic tool development to deployed tools on nanoHUB.org"
3rd nanowire growth workshop, Duisburg, Germany, Sept. 14-16, 2008.20080
0