Saumitra Mehrotra

Effect of Fin Tapering in Nanoscale Si FinFETs

Effect of Fin Tapering in Nanoscale Si FinFETs S. Mehrotra, A. Paul, M. Povolotskyi, T. Kubis & G. Klimeck

Objective:

  • Effect of fin angle tapering on FinFET performance.

Approach:

  • Self consistent Schrödinger +Poisson simulation of FinFETs.
  • Ballistic Top-of-the-Barrier transport model NEMO5.

Results:

  • Fin tapering leads to ↓charge due to reduced Cgs for n- and p- FinFETs but leads to ↑ vinj for p-FinFET and no change for n-FinFET.
  • Fin tapering affects leads to degradation in n-FinFET and no affect on p-FinFET.

Impact:

  • Published in IWCE 2013, Trans. Elec. Dev (under prep.)



 

Saumitra Mehrotra's Pages

Biography Development of Nanowire code on nanoHUB Development of simulation tools for semiconductor course work Performance of Trigated Silicon Nanowire pMOSFETs: Surface and Orientation dependence On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Effect of biaxial+uniaxial compressive strain on SiGe /Si hole bandstructure and pMOSFET Atomistic approach to alloy scattering in SiGe Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering Benchmarking of bulk SiGe and strained SiGe/(100)Si bandstructure using Tight-binding VCA model Ballistic hole injection velocity analysis in Ge UTB pMOSFETs Engineering nanowire n-MOSFETs at Lg < 8nm Atomistic simulation of phonon and alloy limited hole mobility in Si1-xGex nanowires Simulation Study of Thin-Body Ballistic n-MOSFET Involving Transport in Mixed Γ-L valleys Effect of Fin Tapering in Nanoscale Si FinFETs Group Publications

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