Saumitra Mehrotra

Development of Nanowire code on nanoHUB.

Development of Educational Simulation Tools for Semiconductor Courses Saumitra Raj Mehrotra & Gerhard Klimeck

Need:

  • Simulation tools for undergraduate and graduate semiconductor courses.

Approach:

  • Tools based on PADRE
  • Frontend GUI using Rappture
  • Homework problems associated with the simulation tool.

Impact:

  • Supplementing semiconductor coursework in various universities.
  • 3 tools, user data as of Oct 2008
  • Drift Diffusion Lab 180 users
  • BJT Lab 150 users
  • MESFET Lab (launched Nov 2008)

Results:

  • Tools are part of ABACUS suite

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Saumitra Mehrotra's Pages

Biography Development of Nanowire code on nanoHUB Development of simulation tools for semiconductor course work Performance of Trigated Silicon Nanowire pMOSFETs: Surface and Orientation dependence On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Effect of biaxial+uniaxial compressive strain on SiGe /Si hole bandstructure and pMOSFET Atomistic approach to alloy scattering in SiGe Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering Benchmarking of bulk SiGe and strained SiGe/(100)Si bandstructure using Tight-binding VCA model Ballistic hole injection velocity analysis in Ge UTB pMOSFETs Engineering nanowire n-MOSFETs at Lg < 8nm Atomistic simulation of phonon and alloy limited hole mobility in Si1-xGex nanowires Simulation Study of Thin-Body Ballistic n-MOSFET Involving Transport in Mixed Γ-L valleys Effect of Fin Tapering in Nanoscale Si FinFETs Group Publications

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