Saumitra Mehrotra

Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering

Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering Saumitra Raj Mehrotra & Gerhard Klimeck

CHALLENGE:

  • III-V materials have high electron mobility but low hole mobility
  • Performance enhancement of GaAs materials for PMOSFET.

OBJECTIVE:

  • Understanding the effect of compressive strain/orientation/body thickness in ON current in GaAs UTB..

APPROACH

  • Calculated ON current using sp3s*d5 TB
    bandstructure model & capacitance model
    including quantum capacitance

IMPACT

  • (110)/<110> provides highest Ion with body thickness scaling.
  • Published in : Device Research Conference (DRC), 2011 69th Annual

 

Powerpoint slide as pdf, or as image below.

Saumitra Mehrotra's Pages

Biography Development of Nanowire code on nanoHUB Development of simulation tools for semiconductor course work Performance of Trigated Silicon Nanowire pMOSFETs: Surface and Orientation dependence On validity of the Top of the Barrier model for Quantum Transport in Nanowire MOSFETs Effect of biaxial+uniaxial compressive strain on SiGe /Si hole bandstructure and pMOSFET Atomistic approach to alloy scattering in SiGe Performance enhancement of GaAs UTB pFETs by strain, orientation and body thickness engineering Benchmarking of bulk SiGe and strained SiGe/(100)Si bandstructure using Tight-binding VCA model Ballistic hole injection velocity analysis in Ge UTB pMOSFETs Engineering nanowire n-MOSFETs at Lg < 8nm Atomistic simulation of phonon and alloy limited hole mobility in Si1-xGex nanowires Simulation Study of Thin-Body Ballistic n-MOSFET Involving Transport in Mixed Γ-L valleys Effect of Fin Tapering in Nanoscale Si FinFETs Group Publications

Research Group

Members Alumni Visitors Pictures Prospective Students Member Access