Nanostructured Thermal Materials [poster]

Nanostructured Thermal Materials [poster]

Event Date: December 11, 2011
Authors: A.M. Marconnet, Y. Gao, E. Bozorg-Grayeli, Y. Won, T. Kodama, M. Asheghi, and K.E. Goodson
Journal: th US-Japan Joint Seminar on Nanoscale Transport Phenomena - Science and Engineering
7th US-Japan Joint Seminar on Nanoscale Transport Phenomena - Science and Engineering, Shima, Japan, 2011

A wide range of applications ranging from thermal interfaces to energy and data storage technologies to CMOS-compatible photonics are benefitting from nanostructured materials.  A primary goal is unique combinations of thermal, mechanical, electrical, and optical properties that are unavailable in nature. This requires precise control of structural parameters through fabrication details, chemical composition, and nanoscale geometries.  This also requires metrology innovation including techniques for determining multiple properties during, for example, short-timescale annealing and/or mechanical stress. 

This poster summarizes progress at Stanford on A) vertically aligned carbon nanotube films for thermal interface materials, B) nanobeam photonic crystal cavities for CMOS compatible light sources, and C) thermally-resistive nanolayers for improved efficiency in phase change memory (PCRAM).  Recent progress for aligned CNT films (A) includes a MEMS-resonator based modulus measurement technique [1]. Thermal conduction data for densified aligned CNT-epoxy composites yield axial thermal conductivities larger by a factor of 18.5 at a volume fractions of 16.7 vol.%, and the observed conductivity anisotropy correlates well with predictions based on CNT alignment [2].  Nanobeam photonic crystal cavities (B) are promising for CMOS compatible, low-threshold lasers, and other active nanophotonic devices. Our electrothermal characterization of suspended nanobeam photonic crystals yields effective thermal conductivity data that are strongly reduced by phonon scattering on bridge and hole boundaries.  The energy consumption in phase change memory devices (C) is governed in part by thermal conduction to the metallic interconnects and is reduced by metal-semiconductor thermal interface resistances [3].  This work develops multilayers that provide thermal insulation for active regions while maintaining moderate electrical conductance [4].

References

[1]  Y. Won, et al., Carbon, 2011.

[2]  A. M. Marconnet, et al., ACS Nano, 2011.

[3]  H. P. Wong, et al., Proceedings of the IEEE, 2010.

[4]  E. Bozorg-Grayeli, et al., IEEE EDL, 2011.