Two-Dimensional Transistors

The quest for low power and high speed FETs have led to aggressive voltage and dimension scaling. However, this leads to certain other effects, e.g., increased leakage, DIBL, lesser electrostatic, etc. in silicon-based devices. Researchers are in quest of new materials that can circumvent such effects. In this regard, 2D transition metal dichalcogenides (TMD) has gathered a lot of attention. 2D TMD based FETs promise excellent scalability, gate control, etc.

As part of the SRC nCore center at Purdue University, we are conducting a top-down study of 2D TMD based FETs, which includes material analysis, enhancing 2D TMD FET performance, and performance of 2D TMD based device-circuit-system. The role of our group is to explore techniques of device-circuit optimization in emerging 2D-FET devices/circuit and benchmark 2D TMD FET based circuits against those with state-of-the-art technologies, e.g., FinFET. To that effect, we are developing circuit compatible compact model of multi-channel TMD FET (proposed by Prof. Appenzellar's group) and developing a framework and logic gate libraries of multi-channel TMD FETs.  

Modeling of 2D-EFETs and device-circuit co-design of 2D-EFET based Logic and Memory:

2D-Electrostrictive Field Effect Transistor (2D-EFET) is a recently proposed steep switching device (<60mV/dec) that operates on the principle of dynamic bandgap (E_G) modulation of 2D TMD channel, comprising of MoS₂/WSe₂. 2D-EFET consists of a piezoelectric/electrostrictive material (PZT/PMN-PT) between its gate (G) and back terminal (B). Bandgap reduction (ΔE_G) is achieved by applying voltage V_GB across piezoelectric/electrostrictive material, which transduces as stress to the 2D TMD channel, yielding sub-60mV/decade sub-threshold swing (SS).

For this project, we developed a circuit compatible compact model of the 2D-EFET. Using this model, we established the design space of 2D-EFET which provided thrust for evolution of the experimental device. Further, we studied performance of 2D-EFETs in circuits by means of ring oscillator and 6T-SRAM. We developed techniques for their device-circuit co-optimization. By utilizing the unique properties of 2D-EFET, we have proposed novel circuits, viz., (a) 2T EFET based Schmitt Trigger and (b) Back Voltage Modulated 2D-EFET 6T SRAM design.