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Ye, Peide "Peter"

Professor of Electrical and Computer Engineering




Vita

Research
-Atomic Layer Depostion (ALD)

  
ALD based nano-materials
  
ALD based nano-devices
  
ALD based nano-physics
  
ALD based nano-structures

Courses
  ECE 201 Linear Circuit Analysis
  ECE 255 Microelectronic Circuit Design

  ECE 659V High-Speed Semiconductor Device
  ECE 658   Semiconductor Material and Device     Characterization
  EPICS (Engineering Project In Community Service)

 

News in ALD group

 

Group Picture Spring 2011

(We are missing Kun and Lin)

 

Group Picture Winter 2012

(We are missing Kun and Sami)

 

 

 


We are pursuing our research to be as magnificent, impressive, and elegant as this Crescent Moon Tower. 

Postal Address: Purdue University
School of Electrical and Computer Engineering
465 Northwestern Ave.
West Lafayette, Indiana 47907-2035

Birck Nanotechnology Center
1205 West State Street
West Lafayette, Indiana 47907-2057

Office: BRK 1291 (Birck)  Primary
EE 252 (ECE)

Phone: Phone: 765.494.7611
Fax:     765.496.7443

E-Mail: yep@purdue.edu

Education: * BS, Fudan University, Shanghai, China, 1988
* Ph.D., Max-Planck-Institute for Solid State Research, Stuttgart, Germany, 1996


Background & Interests:

Semiconductor physics and devices, Nano-structures and nano-fabrications, Quantum/spin-transport, Atomic layer deposition, High-k/III-V device integration, High-performance III-V MOSFETs, High-k/graphene integration, High-performance graphene FETs, Graphene spintronics, All oxide electronics, and Topological insulators.

Recent News in our ALD Group:

"IEEE Spectrum" magazine, the most prestigious one in electrical engineering society, publishes a long feature article about our break-through work on ALD high-k/InGaAs MOSFET. This article also reviews the history and current status of GaAs MOSFET research. PDF

Science quotes our breakthrough work on InGaAs MOSFET in its editorial article published on Feb. 20, 2009. PDF

Three papers on InGaAs MOSFETs (PDF), FinFETs (PDF) and GaAs interface studies (PDF) are accepted by IEDM 2009. Yanqing Wu's the first III-V FinFET work is selected as one of eight highlights for the coming IEDM.

The world first III-V FinFET gets wide interests from the device community:

Purdue News Press: http://www.purdue.edu/newsroom/research/2009/nov/091110YeFinfets.html

IEEE IEDM Press: http://btbmarketing.com/iedm/

IEEE Spectrum Press: http://spectrum.ieee.org/semiconductors/devices/first-galliumbased-finfets/0

National Science Foundation Highlights: http://www.nsf.gov/news/news_summ.jsp?cntn_id=115967

 

The first III-V MOSFET book, co-edited by Peide Ye, is published in April 2010 by Springer. PDF

 

Lin Dong's work on ALD LaAlO3/SrTiO3 all oxide FETs is accepted by IEDM 2010. PDF

 

Two IEDM papers are accepted this year for the coming meeting in December 2011. The first one is Jiangjiang Gu's the first experimental demonstration of gate-all-around (GAA) III-V MOSFET by top-down approach. The second one is the joint paper with Fudan University on InGaAs MOSFET reliability study.

 

Peide Ye receives 2011 IBM Faculty Award.

 

Jiangjiang Gu's breakthrough work on world-first top-down gate-all-around (GAA) III-V nanowire FET got a lot of attentions from CMOS and nanoelectronics community after IEDM report.

Purdue News Press: http://www.purdue.edu/newsroom/research/2011/111206YeTransistors.html

IEEE Spectrum Press: http://spectrum.ieee.org/nanoclast/semiconductors/nanotechnology/ieee-meeting-plays-host-to-the-nanomaterials-that-aim-to-displace-silicon

Compound Semiconductor Press: http://www.compoundsemiconductor.net/csc/features-details.php?cat=news&id=19734345

Wikipedia: http://en.wikipedia.org/wiki/Multigate_device#cite_note-18

 

Jiangjiang Gu receives 2012 Bilsland Dissertation Fellowship.

 

Peide Ye has been selected by a panel of distinguished professors at Purdue to be a University Faculty Scholar.

 

Three papers were presented at 2012 Device Research Conference (DRC) including 2 Late News Papers. They are Jiangjiang Gu's "III-V 4D Transistors" PDF, Kun Xu's "IPE study of graphene band alignment" in collaborations with NIST and UCLA PDF, and Adam Neal and Han Liu's "Metal Contacts to MoS2" PDF This is the first time for our group having Late News Papers in a competitive conference.

 

Yanqing Wu's graphene FET paper is among the most downloaded Appl. Phys. Letters paper in the past 5 years.

https://engineering.purdue.edu/ECE/Spotlights/article-by-professor-peide-ye-and-collaborators-among-the-most-downloaded-articles-in-applied-physics-letters

 

Jiangjiang's two papers on III-V GAA nanowire FETs are accepted by IEDM. They are "20-80nm Channel Length InGaAs Gate-all-around Nanowire MOSFETs with EOT=1.2nm and Lowest SS=63mV/dec" and "III-V Gate-all-around Nanowire MOSFET Process Technology: From 3D to 4D". The work is in close collaborations with Prof. Roy Gordon's group at Harvard University. 

Purdue New Press: http://www.purdue.edu/newsroom/releases/2012/Q4/new-4-d-transistor-is-preview-of-future-computers.html

Semiconductor Today: http://www.semiconductor-today.com/news_items/2012/DEC/PURDUE_211212.html

 

Peide Ye has been named IEEE Fellow in December 2012. He was honored for his contributions to compound semiconductor MOSFET materials and devices. IEEE Fellow is the highest grade of membership and is recognized by the technical community as a prestigious honor and an important career achievement.

 

Jiangjiang Gu wins 2012 SISC Ed Nicollian Best Student Paper Award

https://engineering.purdue.edu/ECE/Spotlights/graduate-student-jiangjiang-gu-wins-2012-sisc-ed-nicollian-best-student-paper-award-he-is-advised-by-professor-peide-peter-ye

 

Han Liu receives 2013 Bilsland Dissertation Fellowship.

 

Lin Dong's work on atomic layer epitaxial oxide on GaAs (111)A surface was reported by Semiconductor Today

http://www.semiconductor-today.com/news_items/2013/MAR/PURDUE_270313.html

 

High-k/AlGaN/GaN MOS-HEMT was reported by Semiconductor Today

http://www.semiconductor-today.com/news_items/2013/MAY/BAE_100513.html

 

Three papers were presented at 2013 Device Research Conference (DRC) including 1 Late News Paper. They are Mengwei's "Raised source/drain III-V 3D Transistors" with Harvard, Han Liu's "CVD MoS2 FETs" with Rice, and Heng Wu's "Room-temperature Quantum Oscillations on Sub-10nm Ge MOSFETs" as the Late News Paper. 

 

Heng Wu wins 2013 SISC Ed Nicollian Best Student Paper Award

https://engineering.purdue.edu/ECE/Spotlights/graduate-student-heng-wu-wins-2013-sisc-ed-nicollian-best-student-paper-award

 

Han Liu and Adam Neal's work on phosphorene starts to attract attention in nano-materials and nano-electronics communities:

http://www.newscientist.com/article/dn24939-graphene-rival-phosphorene-is-born-to-be-a-transistor.html#.UuK6NHlULwc

http://www.rsc.org/chemistryworld/2014/01/phosphorene-2d-electronics

http://www.electronicsweekly.com/news/research/phosphorene-graphene-bandgap-2014-01/

https://www.sciencenews.org/article/phosphorene-introduced-graphene-alternative

 

Nature reports: Phosphorene excites materials scientists Papers\Nature_Phosphorene_2014.pdf

 

Han Liu receives the CoE Outstanding Grad Student Research Award for his outstanding work on MoS2 and Phosphorene.

 

Three papers are accepted by VLSI 2014 including one Late News Paper. They are Heng Wu's "Ge CMOS: Breakthroughs of nFETs (Imax=714 mA/mm, gmax=590 mS/mm) by recessed channel and S/D" and Lin Dong's "III-V CMOS Devices and Circuits with High-Quality Atomic-Layer-Epitaxial La2O3/GaAs Interface". The Late News Paper is Lingming Yang's "High-Performance MoS2 Field-Effect Transistors Enabled by Chloride Doping: Record Low Contact Resistance (0.5kΩum) and Record High Drain Current (460 uA/um)" in collaborations with SEMATECH and Intel Cooperation.

 

Three papers with two orals and one poster are accepted for DRC 2014. They are Han Liu's phosphorene ambipolar FET, Heng Wu's InAs NW MOSFETs and Yuchen Du's graphene/MoS2 contacts.