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Mark Johnson

Curriculum Vitae

Mark C. Johnson

Interests

Electrical and Computer Engineering laboratory curriculum, digital systems design, CAD for VLSI.

Education

PURDUE UNIVERSITY, West Lafayette, Indiana Ph.D.E.E. Completed August 1998
WICHITA STATE UNIVERSITY, Wichita, Kansas M.S.E.E. Completed December 1991
PURDUE UNIVERSITY -- CALUMET, Hammond, Indiana B.S.E.E. Completed May 1983

Employment

PURDUE UNIVERSITY, West Lafayette, Indiana

2012 - present: Director, Instructional Laboratories. Previously Manager, Digital and Systems Laboratories. Responsibilities include writing proposals for lab improvements, specifying and acquiring lab improvements, planning for and acquisition of computing resources, administration and support of computer aided design (CAD) software for VLSI, Computer Engineering, and Solid-State areas, consultant to faculty and students on use of CAD tools, development of lab curricula, and teaching and supervision of selected Computer Engineering area laboratory courses.
 
Current teaching responsibilities: Lecturer and supervisor of laboratories for ECE337 ASIC Design Laboratory, Supervisor of laboratory and co-instructor for ECE437 Computer Design and Prototyping, Supervisor of laboratory for ECE364 Software Engineering Tools, Co-advisor for System on Chip Extension Technologies Vertically Integrated Projects Team

ROSE-HULMAN Institute of Technology, Terre Haute, Indiana

8/98-5/99: Assistant Professor. Courses taught included Digital Systems Design, VLSI Design, Digital Signal Processing, Logic Design.

PURDUE UNIVERSITY, West Lafayette, Indiana

1/96-6/98: research assistant to Prof. Kaushik Roy.
 
8/97-12/97: EE559 (MOS VLSI Design) instructor.
 
8/94 - 5/96: EE357 (VLSI lab) teaching assistant.
 
1/95 - 5/96: EE357 course and lab coordinator.
 
6/95 - 8/95: EE362 (Microprocessor interface lab) teaching assistant.

THOMSON CONSUMER ELECTRONICS, Indianapolis, Indiana

1/91 - 8/94: Coordinated a "Quality Leadership Process" team to evaluate and select a standard set of Computer Aided Engineering (CAE) tools for non-IC design tasks.
 
3/92 - 8/94: Created PC network based installation of schematic capture and simulation software. Approximately 95 DOS and 5 UNIX based systems (Sun Sparc and IBM RS6000) installed. Responsibilities included administration, user support, user meetings, and coordination of training. Long term projects included integration of CAE tools into
TCE's component database, part list, change report, and circuit board layout systems, development of analog model libraries, and investigating new CAE software.

BOEING MILITARY (and COMMERCIAL) AIRPLANES, Wichita, Kansas

1/90 - 12/90: Assisted in planning and implementation of an expert system for aircraft component and process specifications. Assisted in planning for an on-line standards documentation system. Interviewed users and assembled requirements for systems to control and streamline the handling of CAD datasets.
 
5/85 - 12/89: Trained users of Mentor Graphics electronic design workstations for circuit design and analysis, provided user support, customized user interfaces, developed Mentor database interfaces, investigated electronic design automation applications of PROLOG. Developed interface from Mentor Graphics to the Altera EPLD design system. Boeing attempted to file a patent on the EPLD interface. Assisted transition from ComputerVision to Mentor Graphics' Board Station software for PCB layout.
 
6/83 - 11/84: Worked in systems and software engineering and for the B-1B Weapon Systems Trainer. Involved with requirements specification and selection of vendors for RADAR and visual simulation. Wrote FORTRAN program to analyze resolution requirements for terrain data base. Designed driver software (FORTRAN) for a tone generator to simulate defensive station audio.

Service

Proceedings chair for the 2003 International Conference on Microelectronic Systems Education (MSE). Program chair for MSE 2005. General chair for MSE 2007. Currently a steering committee member for MSE and sister conference European Workshop on Microelectronics Education.
 
2002 through 2011 - Secretary and webmaster for the Illinois/Indiana Section of the American Society for Engineering Education.
 
2004 through 2012 – Chair of the ECE Instructional Innovation Group. https://engineering.purdue.edu/ECE/EI2G
 

Publications

Refereed Journals:

  1. M.C. Johnson and K. Roy, Datapath scheduling with multiple supply voltages and level converters. ACM Transactions on Design Automation of Electronic Systems, July 1997.
  2. L. Wei, Z. Chen, K. Roy, M. C. Johnson, Y. Ye, Vivek K. Design and optimization of dual-threshold circuits for low-voltage low-power applications IEEE Transactions on Very Large Scale Integration (VLSI) Systems. v 7 n 1 Mar 1999. p 16-24
  3. M. C. Johnson, D. Somasekhar, and K. Roy, Models and Algorithms for Bounds on Leakage in CMOS Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, June 1999.
  4. M. C. Johnson, D. Somasekhar, L.-Y. Chiou, and K. Roy, Leakage Control With Efficient Use of Transistor Stacks in Single Threshold CMOS. IEEE Transactions on Very Large Scale Integration (VLSI) Systems v 10 n 1 Feb 2002, p. 1-5.
  5. T. Donnelly, J. Choi, A. V. Kildishev, M. Swabey, M. C. Johnson, A Comparative Study for Performance and Power Consumption of FPGA Digital Interpolation Filters, (IJACSA) International Journal of Advanced Computer Science and Applications, v 8, n 7, 2017

Conference Papers:

  1. J. Covey, M. C. Johnson – System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration, Proceedings of the 2019 on Great Lakes Symposium on VLSI, Tysons Corner, VA, 2019.
  2. T. Wild, N. Chesnut, G. Martini, M. C. Johnson– Indiana bicentennial torch project: Trial by fire- Proceedings of the International Conference on Microelectronic systems Education; Lake Louise, Alberta, CA; 2017.
  3. M. Lieter, L. Goedde, E. Fredette, N. Chesnut, M. Swabey, M.C. Johnson - Student use and assessment of System on Chip (SOC) prototyping resource - Proceedings of the European Workshop on Microelectronics Education; Southampton, UK, 2016.
  4. M.A. Swabey, M.C. Johnson – Satisfying ABET criterion using an industrial Microelectronic Skills Incubator - Proceedings of the International Conference on Microelectronic systems Education; Pittsburgh, PA; 2015.
  5. I. Biswas, M. Johnson – A Pedagogical Framework to Teach HW-SW Co-Design – Proceedings of the Illinois-Indiana Section of the American Society for Engineering Education Section Conference; Fort Wayne, IN; 2015.
  6. M.C. Johnson, G. Hadley, D.G. Meyer – X86 Motherboards in a Microcontroller Hardware/Software Senior Project Course – Proceedings of the European Workshop on Microelectronics Education; Grenoble, France; 2012.
  7. M.C. Johnson – Interactive Application for learning RTL code structures – Proceedings of the International Conference on Microelectronic systems Education; San Diego, CA; 2011
  8. M.C. Johnson, M. Thottethodi, E. Villasenor, O. Krachina – Undergraduate Dual-Core Prototyping and Analysis of Factors Influencing Student Success on Dual-Core Designs – Proceedings of the International Conference on Microelectronic systems Education; San Francisco, CA; 2009
  9. S. Bagchi, M.C. Johnson, S. Chaterji – Effects of Types of Active Learning Activity on Two Junior-Level Computer Engineering Courses – Proceedings of the Frontiers in Education Conference, Session F2A, 2008.
  10. C. Brown, Y-H. Lu, David Meyer, M.C. Johnson - Hybrid Content Delivery: On-Line Lectures and Interactive Lab Assignments - American Society for Engineering Education Annual Conference, 2008.
  11. C. Brown, M.C. Johnson, J. Lax, Work in progress - Educational Classroom Technology: What Works Best in the Engineering Context - Proceedings of the Frontiers in Education Conference, FIE, v 2007, p. S4J-18 - S4J-19.
  12. M.C. Johnson, Y.-H. Lu, Teaching Software Engineering Through Competition and Collaboration 2006 ASEE Annual Conference & Exposition: Excellence in Education; Chicago, IL; USA; 18-21 June 2006. 2006
  13. E. Zelkowitz, M.C. Johnson, Y.-H. Lu, Quantitative Analysis of Programs: Comparing Open-Source Software with Student Projects, 2006 ASEE Annual Conference & Exposition: Excellence in Education; Chicago, IL; USA; 18-21 June 2006. 2006
  14. M. C. Johnson, Work in Progress - Use of CPU Prototyping and Logic Analyzers to Cultivate Troubleshooting Skills, Frontiers in Education, October 2005, Indianapolis, IN.
  15. M. C. Johnson, C. Watson, S. Davidson, D. Eschbach, Gene Sequence Inspired Design Plagiarism Screening, ASEE Annual Conference and Exposition, June 2004, Salt Lake City, UT.
  16. M. C. Johnson, Digital Design Education Infrastructure Using Multiple EDA Tool Vendors, Microelectronic Systems Education 2001.
  17. M. C. Johnson, D. Somasekhar, K. Roy, Leakage Control With Efficient Use of Transistor Stacks in Single Threshold CMOS, Proceedings of the 36th Design Automation Conference, 1999.
  18. Z. Chen, L. Wei, M.C. Johnson, and K. Roy, Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks, Proceedings of the International Symposium on Low Power Design and Electronics, 1998.
  19. L. Wei, Z. Chen, M.C. Johnson, and K. Roy, Design and optimization of low voltage high performance dual threshold CMOS circuits, Proceedings of 35th Design Automation Conference, 1998.
  20. M.C. Johnson and K. Roy, Scheduling and optimal voltage selection for low power multi-voltage DSP datapaths. Proceedings, IEEE International Symposium on Circuits and Systems. Vol. 3, pp. 2152-2155, 1997.
  21. M.C. Johnson and K. Roy, Optimal selection of supply voltages and level conversions during datapath scheduling under resource constraints. Proceedings, International Conference on Computer Design, pp. 72-77, 1996.

Book Chapters:

  1. K. Roy and M. C. Johnson, Software design for low power. In Low Power Design in Deep Submicron Electronics - Proceedings of the NATO Advanced Study Institute, Lucca Italy, August 1996, Kluwer Academic Publishers, Dordrecht, the Netherlands.
  2. M. C. Johnson and K. Roy, Software design for low power. In Low Power Design -Technology, Design, and CAD, editors K. Roy and S. Prasad. John Wiley & Sons, Inc. 1999.