Academically, I am a computer architect. I study the design of the hardware components that efficiently solve problems written in software. My research has been recognized with an NSF Career Award in 2020, an NVIDIA graduate fellowship in 2013, best paper nominations at MICRO 2012, PPoPP 2017 and ISPASS 2021, an IEEE Micro Top Picks in Computer Architecture in 2013, as a Communications of the ACM Research Highlight in 2014, and my PhD thesis was nominated for the Governor General of Canada’s Gold Medal and the 2016 ACM Doctoral Dissertation Award. My teaching has been recognized with multiple Outstanding Engineering Teacher citations, the 2018 Ruth and Joel Spira Award for Excellence in Teaching, the 2020 Hesselberth Award for Teaching Excellence, and the 2022 College of Engineering Excellence in Early Career Teaching Award. I completed my PhD in Computer Architecture at the University of British Columbia in 2015. During the course of my PhD, I interned for the research divisions of both AMD and NVIDIA, where I worked on the design of future GPU computing microarchitectures. Prior to entering graduate school, I worked as a software engineer at Electronic Arts where I gained insight into how industrial software is really made.
PhD in Computer Engineering, 2015
University of British Columbia
BEng in Honours Electrical Engineering, 2005
McGill University
An invited article, selected from all the papers published at ISCA in the last 25 years. The retrospective explores the genesis of the paper, its observed impact and the author’s perspective on the lasting effects.
We study the effect sub-core partitioning has on modern GPU cores and propose novel warp distribution and scheduling mechanisms that mitigate imbalance and increased register file bank conflicts.
We study the effects of SIMT acceleration on microservices and propose a novel accelerator, the Request Processing Unit (RPU) that stikes a balance between the energy-efficiency characteristics of GPUs and the latency reducing mechanisms of CPUs.