Changes in Course ECE 559

                                                                             Engineering Faculty Document No. 54-06

                                                                                                                            May 2, 2007

 

 

TO:                 The Faculty of the College of Engineering

FROM:           The Faculty of the School of Electrical and Computer Engineering

RE:                 ECE 559 Changes in Course Description, Content, Prerequisites, and Text

The faculty of the School of Electrical and Computer Engineering has approved the following changes in ECE 559. This action is now submitted to the Engineering Faculty with a recommendation for approval.

From:             ECE 559 – MOS VLSI Design

Sem.1 and 2. Class 3, cr. 3

Prerequisite: Departmental approval required.           

 

An introduction to most aspects of large-scale MOS integrated circuit design including: device fabrication and modeling; useful circuit building blocks; system considerations; and algorithms to accomplish common tasks. Most circuits discussed are treated in detail with particular attention given those circuits whose regular and/or expandable structures are primary candidates for integration. All circuits will be digital and will be considered in the context of the Silicongate MOS enhancement-depletion technology. Homework will require the use of existing IC mask layout software, and term projects will be assigned.

           

To:                  ECE 559 – MOS VLSI Design

Sem. 1, Class 3, cr. 3

Prerequisite: ECE 305 and 437, or consent of instructor.

Prerequisites by Topic:  Semiconductor devices (pn-junction diodes, BJTs, MOSFETs), digital logic (Boolean functions, logic building blocks, finite state machines), computer organization (datapath control, memory hierarchy, arithmetic algorithms).

 

An introduction to most aspects of large-scale MOS integrated circuit design including: device fabrication and modeling; inverter characteristics; designing CMOS combinational and sequential circuits; designing arithmetic building blocks and memory structures; interconnect and timing issues; testing and verification; and system design considerations.  Term projects involve the complete design of a functional logic block or system using CAD tools.

 

Reason:          The course description and prerequisites have been changed to reflect the updated content of the course.

.

Mark Smith, Head

School of Electrical & Computer Engineering


                                                            Engineering Faculty Document No. 54-06

                                                                                                                            May 2, 2007

                                                                                                                              Page 1 of 1

 

ECE 559 - MOS VLSI Design

 

Required Text:  Digital Integrated Circuits: A Design Perspective, 2nd Edition, J. M. Rabaey, A. Chandrakasan, B. Nikolic, Prentice Hall, 2003, ISBN No. 0-13-090996-3.

 

Recommended References:

1. Principles of CMOS VLSI Design: A Systems Perspective, 2nd Edition, N. H. E. Weste and K. Eshraghian, Prentice-Hall, 1993, ISBN No. 0-201-53376-6.

2. Circuits, Interconnects, and Packaging for VLSI, H. Bakoglu, Addison Wesley, ISBN No. 0-201-06088-6.   

                                     Principal Topics

3

Introduction: Historical Perspective and Future Trends; CMOS Process

3

MOS devices, SPICE models

6

Inverters

9

Designing combinational logic gates in CMOS

6

Designing sequential circuits

2

Interconnect and timing issues

3

Designing memory and array structures

3

Designing arithmetic building blocks

2

VLSI testing and verification

2

System design issues

2

Mid-term tests

3

Project Presentations

Course Outcomes:  A student who successfully fulfills the course requirements will have demonstrated:

1) an ability to analyze MOS circuits. [1,2,3,4;].

2) an ability to synthesize MOS circuits. [4;c,e,k].

3) experience in oral presentation, teamwork, and document preparation for a finished design. [5,6;].

4) an ability to create and simulate a hierarchical digital design using commercial grade CAD software. [3,4;b,c,e,k].

 

Outcome Assessment Method:  Homework assignments, Term project, and Exams