Pengyu Long

Suppression of source to drain tunneling in short channel MOSFET

Suppression of source to drain tunneling in short channel MOSFET P. Long, S. Mehrotra, M. Povolotskyi, G. Klimeck, M. Rodwell

Objective:

  • Suppress source-to-drain tunneling for transistors scaling down to 10nm and below without hurting the on-current.
  • Support experimental work at UCSB.

Approach:

  • Low doping spacers was added between the high doping contact and intrinsic channel to engineer the shape of the barrier.
  • Self-consistent Poisson Quantum Transport simulation with tight-binding basis to capture the direct S/D tunneling.

Results:

  • The optimum symmetric spacer length that best preserves the on-current was found.
  • On-current of InGaAs transistor at 10nm is comparable but smaller than Si .