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Phase Engineering to Lowering Down Contact Resistance of 2D Material and Metal interface

Project Description

High contact resistance at the metal–semiconductor interface severely restricts the performance of next-generation nanoelectronic and optoelectronic devices based on two-dimensional (2D) materials. The goal of this research is to create a phase-engineering approach that will enhance charge injection across 2D material–metal contacts and lower contact resistance. In order to provide a low-barrier pathway for effective carrier transport, the main strategy is to engineer the local structural and electronic phase of 2D semiconductors close to the contact site. To alter the Schottky barrier height, density of interface states, and Fermi-level pinning, controlled phase transformation, interface engineering, and selective metal integration will be studied.

The project will comprehensively correlate phase composition, interface chemistry, and electrical transport with representative transition-metal dichalcogenides such MoS₂ and WS₂. To comprehend the mechanisms controlling contact resistance, temperature-dependent current–voltage measurements and sophisticated structural and spectroscopic characterisation will be used. Studies at the device level will assess how designed contacts affect high-frequency performance, mobility, transconductance, and switching characteristics. Future energy-efficient nanoelectronic devices and high-performance 2D transistors are anticipated to be made possible by the proposed work's establishment of scalable design principles for low-resistance connections.

Start Date

January, 2027

Postdoc Qualifications

Dr. Taslim Khan is an experimental materials scientist and semiconductor device researcher with more than six years of research experience in wide-bandgap semiconductors, 2D materials, heterostructure engineering, thin-film growth, and optoelectronic devices. He received his Joint Ph.D. in Physics from IIT Delhi, India, and the International College of Semiconductor Technology (ICST), National Yang Ming Chiao Tung University (NYCU), Taiwan, in 2025. He previously obtained his M.Sc. and B.Sc. (Hons.) in Physics from Aligarh Muslim University, India.

His research expertise encompasses MOCVD, PLD, RF/magnetron sputtering, CVD, and MBE, with particular experience in ZnGa₂O₄, β-Ga₂O₃, ZnO, NiO, 2D materials, and CVD-grown diamond. He has extensive experience in semiconductor device fabrication, including optical lithography, electron-beam/thermal evaporation, ICP-RIE, wet etching, thermal oxidation, and heterostructure integration.

Importantly for the proposed project on **phase engineering of 2D material–metal interfaces**, Dr. Khan has direct experience with 2D materials and heterostructures. His work includes CVD-grown MoS₂ integrated with ZnGa₂O₄, MBE-grown GaTe/MoSe₂ heterostructures, 2D perovskite films, MoTe₂, InSe, and GaTe-based devices. His publications also include work on **2D contact engineering using MBE-grown 1T′-WTe₂ as a van der Waals electrode**, providing direct relevance to low-resistance 2D/metal and van der Waals contacts.

Dr. Khan has authored/co-authored 15 publications with 168 citations, an h-index of 7, and an i10-index of 6. His research has been recognized through the Excellent Student Research Award and Outstanding Student Research Award at NYCU, as well as the Best Poster Award at IWPSD 2021.

Overall, his multidisciplinary expertise in 2D materials, phase/heterostructure engineering, semiconductor processing, interface characterization, and device physics provides a strong experimental foundation for developing phase-engineered, low-resistance contacts for next-generation 2D nanoelectronic devices.

Co-Advisors

Prof. Joerg Appenzeller
Barry M. and Patricia L. Epstein Professor of Electrical and Computer Engineering
Campus: West Lafayette
Office: BRK 1027C
Office Phone: +1 765-494-1076
E-mail: appenzeller@purdue.edu

Bibliography

Kappera, R.; Voiry, D.; Yalcin, S. E.; Branch, M. C.; Gupta, G.; Fagot-Revurat, Y.; Narayanan, T. N.; Tang, H.; Chhowalla, M. Phase-Engineered Low-Resistance Contacts for Ultrathin MoS₂ Transistors. Nat. Mater. 2014, 13, 1128–1134. DOI: 10.1038/nmat4080.

Wang, Y.; Kim, J. C.; Wu, R. J.; Martinez, J.; Song, X.; Yang, J.; Zhao, F.; Lee, K.; Ma, Z.; Zheng, S.; et al. Van der Waals Contacts between Three-Dimensional Metals and Two-Dimensional Semiconductors. Nature 2019, 568, 70–74. DOI: 10.1038/s41586-019-1052-3.

Allain, A.; Kang, J.; Banerjee, K.; Kis, A. Electrical Contacts to Two-Dimensional Semiconductors. Nat. Mater. 2015, 14, 1195–1205. DOI: 10.1038/nmat4452.

English, C. D.; Shine, G.; Dorgan, A. J.; Saraswat, K. C.; Pop, E. Approaching the Quantum Limit in Two-Dimensional Semiconductor Contacts. Nature 2022, 605, 84–90. DOI: 10.1038/s41586-022-05431-4.

Plasma Knowledge-Based Polymorphic Engineering for Two-Dimensional Semiconductor Contacts. ACS Nano 2026, 20, 5756–5763. DOI: 10.1021/acsnano.5c17260.