Atalla Institute for Advanced System Integration and Packaging (ASIP)

Photo by Intel

As transistor scaling according to Moore's law slows, future applications will require novel system integration solutions to achieve performance, power, and cost tradeoffs while ensuring efficient power conversion and delivery, signal and power integrity, sustainability, testability, and security goals. Increasingly, future electronic systems for computing, mobile communications, IoT, automotive, defense and biological applications will rely on advanced integration of separately manufactured chiplets into a 2.5D/3D System-in-Package (SiP). The ASIP institute will address the challenges to research, "lab-to-fab" translation and workforce necessary to build the future microelectronic systems. The challenges include system architectural and physical design enabled by multiphysics modeling tools, high-density interposers and substrates, process development for interconnect pitch scaling, and thermal solution design, all while meeting the reliability and manufacturing yield goals. The ASIP institute will bring together integrated device manufacturers, fabless companies, EDA companies, equipment vendors, materials suppliers, OSATs, and university academics to develop advanced system integration and packaging solutions.

ASIP institute conducted its first International Workshop for Advanced System Integration and Packaging during December 5-6, 2023.

About Microelectronics Research and Education at Purdue University

College of Engineering at Purdue University is ranked 4th in the US and graduates more engineers than the top three ranked institutions combined. Purdue's excellence at scale is exemplified by the many national and international microelectronic research centers at Purdue that have received over $250 million in research funding. Specifically, in Advanced System Integration and Packaging, Purdue hosts five centers that together conduct nearly $90 million in research. Purdue University, through its expert faculty, is actively involved in guiding the formulation of the CHIPS Act R&D; programs and is vigorously engaged with industry partners on all elements of CHIPS Act programs.


Complementary to the research mission, Purdue created the nation's first MS degree program in semiconductors, with more than 55 Purdue faculty members teaching over 100 courses on semiconductors and advanced packaging. Purdue's educational innovations to motivate talented undergraduate students to pursue careers in semiconductors include the freshmen-level seminar course "Changing the World with Chips - Introduction to Semiconductors," and a unique eight-week hands-on experience in chip design and fabrication termed "Summer Training, Awareness, and Readiness for Semiconductors (STARS)." More information at Semiconductors@Purdue.edu.

Contact: Ganesh Subbarayan, ganeshs@purdue.edu.


Read Gov. Holcomb's Letter to President Chiang (PDF)


Endorsements

"We applaud the establishment of the Institute for Advanced System Integration and Packaging. To cope with the increasing functionality of future systems, advanced packaging solutions such as 3D integration have become indispensable. To realize these complex systems, in-depth understanding and knowledge of advanced packaging is key, including access to modeling and simulation. With our long track record in advanced R&D; on semiconductor and system integration and packaging and our mission to drive the semiconductor industry forward by collaborating with the entire value chain, we look forward to partnering with ASIP to build up the necessary knowledge. An initiative like ASIP is important to enabling the Chips Act and propelling the semiconductor industry forward."

—Luc Van den hove, President and CEO of imec

"Purdue University is a nationally recognized leader in academic excellence and microelectronics workforce development," said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. "We are excited to collaborate with Purdue to ensure that the next generation of advanced package designers are equipped to address not only the electromagnetic challenges of heterogeneous 3D-ICs, but also the multiphysics challenges of power, thermal integrity, signal integrity, and mechanical stress. Ensuring the graduating engineers are familiar with using commercial tools on these systems will give the students and their future employers a competitive advantage."

—Cadence

"Purdue and Osaka University are natural partners with their leading research roles in the area of advanced packaging. Our research strengths are complementary. We are actively engaged in creating collaborative opportunities between companies of our two countries to secure the global supply chain."

—Professor Suganuma, Director of Flexible 3D Integration laboratory at Osaka University

"SRC is a major sponsor of research and workforce development efforts at Purdue University through its funding of CHIRP as well as CBRIC, COCOSYS and NEW LIMITS centers," said Semiconductor Research Corporation President & CEO Todd Younkin. "We look forward to partnering with the ASIP Institute as we broaden and deepen our engagement with Purdue University." Dave Henshall, SRC VP of Business Development states, "The formation of ASIP is very timely. Purdue researchers have played a leadership role in developing the SRC MAPT roadmap for the nation, and we look forward to building upon that in ways that will energize advanced packaging design and manufacturing in the US."

—SRC