Samarth Agarwal

Objective:

• To explore design ideas for voltage scaling of transistors.

Approach:

• V_DD scaling : Difficult in MOSFETs, possible in TFETs.
• gFET: Larger tunneling area gives higher I_ON than conventional TFETs.
• Modified and optimized gFET design to meet ITRS requirements.

Impact:

• gFET with high I_ON and low I_OFF will provide a viable alternative for VDD scaling to reduce power consumption.