Multi-Gate FETs

Short Channel Effect in MuGFET

Objective:

Approach:

  • Simulate the gate-all-around nanowire and the double gate finFET
  • Calculate the drain induced barrier lowering (DIBL), the threshold voltage (Vth), the Subthreshold Swing (SS) while reducing the gate length (Lg)

Impact

  • Quantitative prediction of short channel effect

Results:

  • Significant impact of short channel length on DIBL, Vth, SS when the gate length below 40 nm
  • Nanowire is a better candidate to suppress the short channel effect

Group member involved: