STARS / SoCET - System on Chip Extension Technologies
SoCET is organized into several divisions in Indianapolis and West Lafayette, allowing for students to enter at different points based on their academic experience. STARS: Chip Design Skills(first semester), STARS: Chip Design Projects(second semester), and SoCET Main Team.
Advisors:
Description:
SoCET is organized into several divisions in Indianapolis and West Lafayette, allowing for students to enter at different points based on their academic experience. STARS: Chip Design Skills(first semester), STARS: Chip Design Projects(second semester), and SoCET Main Team.
Each section has its own expectations, technical focus, and application process. Students in their first and second year will benefit greatly from the Chip Design Skills and Projects, where Chip Design Skills will follow a lecture style course in a semester and Chip Design Projects will capitalize on lecture material to tapeout a student team design in a semester.
To apply for STARS or SoCET, please go to the website below for links.
Revelant Technologies:
- RISCV open source processor
- Verilog hardware description languages
- FPGA
- UVM (Universal Verification Methodology)
- Verilog/System Verilog coding
- Digital circuit simulation (Modelsim™, Questasim™, NCsim™, others)
- Analog circuit simulation (Spectre™)
- PCB layout
- Transistor level design (Virtuoso™)
- Chip layout (Innovus™ and Virtuoso™
- Git repository management
Prerequisites
- None