General (Dr. Kaushik Roy)
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Edward G. Tiedemann Jr. Distingusihed Professor of ECE
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Fellow, IEEE.
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IEEE Technical Committee on Very Large Scale Integration Distinguished Research Award, 2021
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Purdue University Arden L. Bement Jr. Award, 2020
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Semiconductor Research Corporation (SRC) Aristotle Award, 2015
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Humboldt Research Award, 2010
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IEEE Circuits and Systems Society Technical Achievement Award, 2011
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Distinguished Alunus Award, Indian Institute of Technology, Kharagpur, 2011
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Fulbright-Nehru Distinguished Chair
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Purdue University Faculty Scholar
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Semiconductor Research Corporation Technical Excellence Award, 2005
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Purdue University College of Engineering Research Award, 2008
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Research Visionary Board Member, Motorola Labs, 2002.
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IBM Faculty Partnership Award, 2001
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ATT/Lucent Foundation award, 1997.
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NSF CAREER development award, 1995.
Best paper awards:
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2020 Oak Ridge National Laboratories International Conference on Neuromorphic Systems (ICONS) Best Paper Award for paper titled, "Accurate and Accelerated Neuromorphic Network Design Leveraging A Bayesian Hyperparameter Pareto Optimization Approach."
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2013 IEEE Transactions on VLSI Systems Best paper Award for paper titled, "Design Paradigm for Robust Spin-Torque Transfer Magnetic RAM (STT MRAM) From Circuit/Architecture Perspective "
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2012 IEEE Symposium on Low-Power Electronics and Design best paper award for paper titled, "TapeCache: High Density, Energy Ecient Cache Based on Domain Wall Memory"
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2006 IEEE Transactions on VLSI Systems Best Paper Award for paper titled, "A Process-Tolerant Cache Architecture for Improved Yield in Nanoscale Technologies."
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2006 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) Best Paper Award for paper titled, "Analysis of Super Cut-off Transistors for Ultralow Power Digital Logic Circuits."
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Low Power Design Contest Award (with C. Kim and J. Kim) for "A Low-Power Embedded SRAM Cache with PVT-Aware Leakage Reduction and Improved Stability in ISLPED 2005."
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2005 IEEE Circuits and Systems Society Outstanding Young Author Award (Chris Kim) for paper titled, "Ultra-Low Power DLMS Adaptive Filter for Hearing Aid Applications" in IEEE Trans. on VLSI Systems.
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"A Novel Low-Power Scan Design Technique Using Supply Gating," IEEE International Conference on Computer Design, 2004.
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"Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Current", Best paper award, 4th IEEE Latin American Test Workshop, 2003.
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"Circuit-Compatible Modeling of Carbon Nanotube FETs in the Ballistic Limit of Performance," Best Student Paper Award, IEEE NANO, 2003.
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"On Effective IDDQ Testing of Low-Voltage CMOS Circuits Using Leakage Control Techniques," Best paper award, IEEE International Sympoisum on Quality of IC Design, 2000.
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"Intrinsic leakage in low-power deep sub micron CMOS ICs" , Honorable Mention Paper Award, International Test Conference, 1997.
Best paper nominations:
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IEEE International Conference on Computer-Aided Design 2007, "Estimation of Statistical Variation in Temporal NBTI Degradation and its Impact in Lifetime Circuit Performance.
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Design Automation Conference, 2007, "Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement"
Student awards:
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Arijit Raychowdhruy received Dimitris N. Chorafas Foundation Award for Outsanding PhD Thesis for the year 2007
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Nilanjan Banerjee received 2007-2008 Intel Fellwoship award
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Nilanjan Banerjee received 2007 Ford Foundation scholarship
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