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Purdue begins Scifres Nanofabrication Lab renovations, a critical step to propelling leadership in semiconductor education and R&D

Entrance of Birck Nanotechnology Center, built 18 years ago after Purdue University recieved a $30-million gift from Michael and Katherine Birck.

SEPTEMBER 30, 2023 | Share:

Inside the Birck Nanotechnology Center, built 18 years ago after Purdue University received a $30-million gift from Michael and Katherine Birck, is the 25,000-square-foot Scifres Nanofabrication Laboratory cleanroom – one of the largest and best-equipped university cleanrooms in the nation made possible by a $10-million gift from the Donald Scifres family. However, the nearly two-decade-old facility must meet new standards to effectively support goals outlined by the CHIPS and Science Act and further propel Purdue's leadership in research and education excellence in the future of computing.

In April, Purdue approved a $49-million investment in state-of-the-art renovations and equipment upgrades to the Scifres Nanofabrication Laboratory and Birck Nanotechnology Center. The enhancements are a vital aspect of the Purdue Computes initiative, which addresses the rising interest in students and faculty to be at the forefront of life-changing artificial intelligence and semiconductor chip research and development.

"For nearly 20 years, the Birck Center's Scifres Lab has provided Purdue researchers with unparalleled capabilities for semiconductor research and education. These facility enhancements and equipment upgrades will set the stage for the next era of Purdue leadership in semiconductors," said Mark Lundstrom, Purdue's Chief Semiconductor Officer.

Additionally, the renovations will support Purdue's position as a leading institution in work related to the CHIPS and Science Act. Announced last year, the industrial strategy seeks to reshore American semiconductor chip manufacturing. American companies make up 48% of chip sales globally but only 12% of fabrications are located on U.S. shores, according to a 2020 report by the Semiconductor Industry Association and Boston Consulting Group.

"Purdue is known for its largest engineering program in the nation and cutting-edge facilities like the Birck Nanotechnology Center," said Zhihong Chen, Mary Jo and Robert L. Kirk Director of Birck Nanotechnology Center. "The planned facility enhancements are anticipated to make Purdue an even stronger academic participant in the CHIPS Act programs, supporting the lab-to-fab transition."

Lab-to-fab refers to the time and processes required to take scientific discoveries and technological development – like those generated in the Scifres Nanofabrication Laboratory – and convert them into manufacturable processes that a production line can quickly adopt. This transition typically takes more than a decade, a timeline that the CHIPS Act seeks to shorten.

"Birck has one of the largest university cleanrooms and some of the best tools among our peer institutions, but we can only accommodate tiny samples," Chen said. "It's more difficult for companies to transfer our research findings and knowledge into wafer-scale processes."

Samples produced by Purdue faculty and students are currently 1-inch by 1-inch. However, the most advanced semiconductor manufacturing technologies use 12-inch wafer-scale equipment because larger wafers hold more silicon transistors, ultimately reducing the cost of manufacturing computer chips.

"What we can do as an academic institute is to acquire equipment to process 8-inch wafers, which is much more compatible with our industry partners," Chen said.

Upgrading from 1-inch samples to 8-inch wafers enables companies to adopt researchers' findings into their manufacturing processes faster.

These renovations will fulfill the goals of the CHIPS Act in three ways. First, renovations will reconstruct and repurpose a portion of the cleanroom and lab space so the facility can handle advanced equipment that processes larger wafers. This includes a student training bay, a dedicated cleanroom and lab space for packaging research, and shared quantum transport and characterization facilities. The third floor will receive updated air handling, and the first-floor subfab that houses specialized equipment and utilities for the cleanroom will be upgraded.

Secondly, Purdue will procure state-of-the-art equipment for device fabrication and characterization. Upgraded physical structure and equipment support the final strategic goal of renovations: providing the research center with enhanced capacity for future research.

"The renovations will introduce new capabilities that didn't exist before – which makes our faculty and students very excited," said Chen. "These enhanced resources have the potential to elevate basic science, offering a more capable platform for new discoveries – whether directly tied to CHIPS or not."

Indianapolis-based Applied Engineering and DELV Design will lead the engineering and architecture components of the renovations. According to Capital Asset Management Project Manager Mark Sammons, the project is currently in the design process, with construction bidding documents expected in October 2023. Construction is anticipated to begin in January 2024.

For researchers, it will be business as usual.

"We're not going to slow anything down. The cleanroom will be operating as normal. We'll just be kind of working around each other in the spaces as we move through the areas," Sammons said.

Far from being just a facelift, the renovations will help Purdue maintain its leadership in semiconductor research and development and education, an increasingly critical initiative both at Purdue and on a national scale.

"These renovations are one more indication of how Purdue University is rising to the challenge and helping the nation address its semiconductor challenge," Lundstrom noted.

Renovations are expected to be completed in July 2025.