Note


Recent Publications


TimeTrader: Exploiting latency tail to reduce datacenter energy for online search
Balajee Valmanan, Hamza Sohail, Jahangir Hasan, and T. N. Vijaykumar
In Proceedings of the 48th Annual International Symposium on Microarchitecture (Micro), pages 585-597, December 2015. (61/283)

FaultHound: Value Locality-based soft-fault tolerance
Nitin, Irith Pomeranz, and T. N. Vijaykumar
In Proceedings of the 42nd Annual International Symposium on Computer Architecture (ISCA), pages 668-681, June 2015. (58/305)

Fractal++: Closing the performance gap between fractal and conventional coherence
Gwendolyn Voskuilen and T. N. Vijaykumar
In Proceedings of the 41st Annual International Symposium on Computer Architecture (ISCA), pages 409-420, June 2014. (46/258)

High-performance fractal coherence
Gwendolyn Voskuilen and T. N. Vijaykumar
In Proceedings of the 19th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 701-714, March 2014. (49/217)

ShuffleWatcher: Shuffle-aware scheduling in multi-tenant MapReduce clusters
Faraz Ahmad, Srimat Chakradhar, Anand Raghunathan and T. N. Vijaykumar
In Proceedings of the 2014 USENIX conference on USENIX Annual Technical Conference (USENIX ATC'14), pages 1-12, June 2014. (44/245)

Wait-n-GoTM: improving HTM performance by serializing cyclic dependencies
Syed Ali Raza Jafri, Gwendolyn Voskuilen and T. N. Vijaykumar
In Proceedings of the 18th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 521-534, March 2013. (44/191)

Deadline-aware Datacenter TCP (D2TCP)
Balajee Vamanan, Jahangir Hasan, and T. N. Vijaykumar
In Proceedings of the ACM SIGCOMM 2012 Conference on Computer Communications (SIGCOMM), pages 115-126, August 2012. (32/235)

Tarazu: Optimizing MapReduce on Heterogeneous Clusters
Faraz Ahmad, Srimat Chakradhar, Anand Raghunathan and T. N. Vijaykumar
In Proceedings of the 17th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 61-74, March 2012. (37/172)

TreeCAM: Decoupling Updates and Lookups in Packet Classification
Balajee Vamanan and T. N. Vijaykumar
In Proceedings of the Seventh COnference on emerging Networking EXperiments and Technologies (CONEXT), pages 27:1-27:12, December 2011. (30/159)

Adaptive Flow Control for Robust Performance and Energy
Syed Ali Raza Jafri, Yu-Ju Hong, Mithuna Thottethodi and T. N. Vijaykumar
In Proceedings of the 43rd Annual International Symposium on Microarchitecture (MICRO), pages 433-444, December 2010. (accept 45 out of 248)

EffiCuts: Optimizing Packet Classification for Memory and Throughput
Balajee Vamanan, Gwendolyn Voskuilen, and T. N. Vijaykumar
In Proceedings of the ACM SIGCOMM 2010 Conference on Computer Communications (SIGCOMM), pages 207-218, August 2010. (accept 33 out of 276)

Timetraveler: Exploiting Acyclic Races for Optimizing Memory Race Recording
Gwendolyn Voskuilen, Faraz Ahmad, and T. N. Vijaykumar
In Proceedings of the 37th Annual International Symposium on Computer Architecture (ISCA), pages 198-209, June 2010. (accept 44 out of 245)

Joint Optimization of Idle and Cooling Power in Data Centers While Maintaining Response Time
Faraz Ahmad and T. N. Vijaykumar.
In Proceedings of the 15th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 243-256, March 2010. (accept 32 out of 181)

LiteTM: Reducing Transactional State Overhead
Syed Ali Jafri, Mithuna Thottethodi, and T. N. Vijaykumar
In Proceedings of the Sixteenth International Symposium on High-Performance Computer Architecture (HPCA), pages 81-92, January 2010. (accept 32 out of 175 submissions)

Shapeshifter: Dynamically changing pipeline width and speed to address process variations
Eric Chun, Zeshan Chishti, and T. N. Vijaykumar
In Proceedings of the 41st Annual International Symposium on Microarchitecture (MICRO), pages 411-422, Novemeber 2008. (accept 40 out of 210 submissions)

Automatic Volume Management for Programmable Microfluidics
Ahmed M. Amin, Mithuna S. Thottethodi, T. N. Vijaykumar, Steven T. Wereley, and Stephen C. Jacobson
In Proceedings of the SIGPLAN '08 Conference on programming language design and implementation (PLDI), pages 56-67, June 2008. (accept 34 out of 184 submissions)

Resource Area Dilation to Reduce Power Density in Throughput Servers
Michael Powell, and T. N. Vijaykumar
In Proceedings of the 2007 International Symposium on Low Power Electronics and Design (ISLPED '07), pages 268-273 August 2007. (accept 57 out of 192 submissions, not counting posters)

BlackJack: Hard Error Detection with Redundant Threads on SMT
Ethan Schuchman and T. N. Vijaykumar
In Proceedings of the 37th International Conference on Dependable Systems and Networks (DSN), pages 327-337, June 2007. (accept 53 out of 235 submissions)

AquaCore: A programmable Architecture for Microfluidics
Ahmed M. Amin, Mithuna S. Thottethodi, T. N. Vijaykumar, Steven T. Wereley, and Stephen C. Jacobson
In Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), pages 254-265, June 2007. (accept 46 out of 204 submissions)
A poster version in the 11th International Conference on Miniaturized Systems for Chemistry and Life Sciences (MicroTAS 2007).

Speculative Thread Decomposition Through Empirical Optimization
Troy Johnson, Rudolf Eigemann and T. N. Vijaykumar
In Proceedings of the 2007 Symposium on Principles and Practice of Parallel Programming (PPoPP), pages 205-214, March 2007. (accept 22 out of 65 submissions)

SmashGuard: A hardware solution to prevent security attacks on the function return address
Hilmi Ozdoganoglu, T. N. Vijaykumar, Carla E. Brodley, Benjamin A. Kupperman, and Ankit Jalote
In the IEEE Transactions on Computers (TC), pages 1271-1285, vol. 55, No. 10, 2006.

A Program Transformation and Architecture Support for Quantum Uncomputation
Ethan Schuchman, and T. N. Vijaykumar
In Proceedings of the 12th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 252-263, October 2006. (accept 38 out of 158 submissions)

Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, and Saurabh Bagchi
In Proceedings of the 24th International Conference on computer design (ICCD)), October 2006. (accept 72 out of 231 submissions)

Do Trace Cache, Value Prediction and Prefetching improve SMT throughput?
Chen-Yong Cher, Il Park and T. N. Vijaykumar
In Proceedings of the Architecture of Computing Systems (ARCS), March 2006.

Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines
Michael D. Powell, Ethan Schuchman, and T. N. Vijaykumar
In Proceedings of the 38th Annual International Symposium on Microarchitecture (MICRO), pages 294-304, December 2005. (accept 29 out of 147 submissions)

Detection and prevention of stack buffer overflow attacks
Benjamin A. Kuperman, Carla E. Brodley, Hilmi Ozdoganoglu, T. N. Vijaykumar, and Ankit Jalote
In Communications of the ACM (CACM), 48(11), pages 50-56, November 2005.

Dynamic Pipelining: Making IP Lookup Truly Scalable
Jahangir Hasan and T. N. Vijaykumar
In Proceedings of the ACM SIGCOMM 2005 Conference on Computer Communications (SIGCOMM), pages 205-216, August 2005. (accept 27 out of 255 submissions)

Opportunistic Transient-Fault Detection
Mohamed Gomaa and T. N. Vijaykumar
In Proceedings of the 32nd Annual International Symposium on Computer Architecture (ISCA), pages 172-183, June 2005. (accept 45 out of 194 submissions) (this paper is one of IEEE Micro's Top Ten papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2005)

Rescue: A Microarchitecture for Testability and Defect Tolerance
Ethan Schuchman and T. N. Vijaykumar
In Proceedings of the 32nd Annual International Symposium on Computer Architecture (ISCA), pages 160-171, June 2005. (accept 45 out of 194 submissions)

Optimizing Replication, Communication, and Capacity Allocation in CMPs
Zeshan Chishti, Michael D. Powell, and T. N. Vijaykumar
In Proceedings of the 32nd Annual International Symposium on Computer Architecture (ISCA), pages 357-368, June 2005. (accept 45 out of 194 submissions)

Heat Stroke: Power-Density-based Denial of Service in SMT
Jahangir Hasan, Ankit Jalote, T. N.Vijaykumar, and Carla Brodley
In Proceedings of the Eleventh International Symposium on High-Performance Computer Architecture (HPCA), pages 166-177, February 2005. (accept 28 out of 181 submissions)

Software Prefetching for Mark-Sweep Garbage Collection: Hardware Analysis and Software Redesign
Chen-Yong Cher, Anthony Hosking, and T. N. Vijaykumar
In Proceedings of the 11th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 199-210, October 2004. (accept 24 out of 169 submissions)

Heat-and-run: Leveraging SMT and CMP to manage power density through the operating system
Michael Powell, Mohamed Gomaa, and T. N. Vijaykumar
In Proceedings of the 11th International Conference on architectural support for programming languages and operating systems (ASPLOS), pages 260-270, October 2004. (accept 24 out of 169 submissions)

Min-cut program decomposition for thread-level speculation
Troy Johnson, Rudolf Eigenmann, and T. N. Vijaykumar
In Proceedings of the SIGPLAN '04 Conference on programming language design and implementation (PLDI), pages 59-70, June 2004. (accept 25 out of 128 submissions)

Wire delay is not a problem for SMT (in the near future)
Zeshan Chishti, and T. N. Vijaykumar
In Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA), pages 40-51, June 2004. (accept 31 out of 218 submissions)

Exploiting resonant behavior to reduce inductive noise
Michael Powell, and T. N. Vijaykumar
In Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA), pages 288-299, June 2004. (accept 31 out of 218 submissions)

Reducing design complexity of the load-store queue
Il Park, Chong-liang Ooi, and T. N. Vijaykumar
In Proceedings of the 36th Annual International Symposium on Microarchitecture (MICRO), pages 411-422, December 2003. (accept 34 out of 135 submissions)

Distance associativity for high-performance energy-efficient non-uniform cache architectures
Zeshan Chishti, Michael Powell, and T. N. Vijaykumar
In Proceedings of the 36th Annual International Symposium on Microarchitecture (MICRO), pages 55-66, December 2003. (accept 34 out of 135 submissions)

VSV: L2-miss-driven variable supply-voltage scaling for low power
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, and Kaushik Roy
In Proceedings of the 36th Annual International Symposium on Microarchitecture (MICRO), pages 19-28, December 2003. (accept 34 out of 135 submissions)
Journal version "Combined circuit and architectural level variable supply-voltage scaling for low power" in the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), pages 564-576, vol. 13, No. 5, May 2005.

Pipeline Muffling and A Priori Current Ramping:microarchitecture techniques to reduce high-frequency inductive noise
Michael Powell, and T. N. Vijaykumar
In Proceedings of the 2003 International Symposium on Low Power Electronics and Design (ISLPED '03), pages 223-228, August 2003. (accept 54 out of 221 submissions, not counting posters)

Efficient use of memory bandwidth to improve network processor throughput
If you are having difficulty with pdf here is the ps version
Jahangir Hasan, Satish Chandra, and T. N. Vijaykumar
In Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA), pages 300-311, June 2003. (accept 36 out of 184 submissions)

Pipeline Damping: A microarchitecture technique to reduce inductive noise in supply voltage
Michael Powell, and T. N. Vijaykumar
In Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA), pages 72-83, June 2003. (accept 36 out of 184 submissions)

Implicitly-Multithreaded Processors
Il Park, Babak Falsafi, and T. N. Vijaykumar
In Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA), pagfes 39-50, June 2003. (accept 36 out of 184 submissions)

Transient-Fault Recovery for Chip Multiprocessors
Mohamed Gomaa, Chad Scarbrough, T. N. Vijaykumar, and Irith Pomeranz
In Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA), pages 98-109, June 2003. (accept 36 out of 184 submissions) (this paper is one of IEEE Micro's Top Ten papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2003)

Accelerating Private-key cryptography via Multithreading on Symmetric Multiprocessors
Praveen Dongara and T. N. Vijaykumar
In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 58-69, March 2003. (accept 22 out of 62 submissions)

Deterministic clock gating to reduce microprocessor power
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, and Kaushik Roy
In Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA), pages 113-122, February 2003. (accept 31 out of 141 submissions)
Journal version DCG: Deterministic clock gating for low-power microprocessor design in the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), pages 245-254, vol. 12, No. 3, March 2004.

Reducing register ports for higher speed and lower power
Il Park, Michael Powell, and T. N. Vijaykumar
In Proceedings of the 35th Annual International Symposium on Microarchitecture (MICRO), pages 171-181, November 2002. (accept 36 out of 150 submissions)

Transient-Fault Recovery via Simultaneous Multithreading
T. N. Vijaykumar, Irith Pomeranz, and Karl Cheng
In Proceedings of the 29th Annual International Symposium on Computer Architecture (ISCA), pages 87-98, May 2002. (accept 27 out of 180 submissions)

Exploiting choice in resizable cache design to optimize deep-submicron processor energy-delay
Se-Hyun Yang, Michael Powell, Babak Falsafi and T. N. Vijaykumar
In Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA), pages 147-158, February 2002. (accept 26 out of 130 submissions)

Skipper: A microarchitecture for exploiting control-flow independence
Chen-Yong Cher and T. N. Vijaykumar
In Proceedings of the 34th Annual International Symposium on Microarchitecture (MICRO), pages 4-15, December 2001. (accept 29 out of 144 submissions)

Reducing set-associative cache energy via selective direct-mapping and way prediction
Michael Powell, Amit Agrawal, T. N. Vijaykumar, Babak Falsafi, and Kaushik Roy
In Proceedings of the 34th Annual International Symposium on Microarchitecture (MICRO), pages 54-65, December 2001. (accept 29 out of 144 submissions)

Reactive-associative caches
Brannon Batson and T. N. Vijaykumar
In Proceedings of the international symposium on parallel architectures and compiler techniques (PACT), pages 49-60, August 2001. (accept 26 out of 126 submissions)

Multiplex: Unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Chong-Liang Ooi, Seon Wook Kim, Il Park, Rudolf Eigenmann, Babak Falsafi, and T. N. Vijaykumar
In the 2001 International Conference on Supercomputing (ICS), pages 368-380, June 2001. (accept 45 out of 133 submissions)

Reference Idempotency: A framework for optimizing speculative execution
Seon Wook Kim, Chong-Liang Ooi, Rudolf Eigenmann, Babak Falsafi, and T. N. Vijaykumar
In the 2001 ACM SIGPLAN symposium on Principles and Practice of Parallel Programming (PPoPP), pages 2-11, June 2001. (accept 14 out of 27 submissions)
Journal version Exploiting Reference Idempotency to reduce speculative state overflow in the ACM Transactions on Programming Languages and Systems (TOPLAS), pages 942-965, vol. 28, No. 5, 2006.

An integrated circuit/architecture approach to reducing leakage in deep-submicron high-performance I-caches
Se-Hyun Yang, Michael Powell, Babak Falsafi, Kaushik Roy, and T. N. Vijaykumar
In the Seventh International Symposium on High-Performance Computer Architecture (HPCA), pages 147-158, January 2001. (accept 26 out of 110 submissions)

Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories
Michael Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
In the 2000 International Symposium on Low Power Electronics and Design (ISLPED '00), pages 90-95, July 2000. (accept 39 out of 162 submissions, not counting posters)
Journal version An Energy-Efficient High Performance Deep-Submicron Instruction Cache in the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), pages 77-89, vol. 9, No. 1, February 2001.

Is SC + ILP = RC?
Kryzstof Gniady, Babak Falsafi, and T. N. Vijaykumar
26th International Symposium on Computer Architecture (ISCA-26), pages 162-171, May 1999. (accept 26 out of 135 submissions) Abstract (this paper is included in the Readings in Computer Architecture)


Grad School Publications


Task Selection for a Multiscalar Processor
T. N. Vijaykumar, and G. S. Sohi
31st International Symposium on Microarchitecture (Micro-31), pages 81-92, Dec 1998. (accept 28 out of 108 submissions) Abstract
Journal version Task Selection for the Multiscalar Architecture in the Journal of Parallel and Distributed Computing (JPDC), pages 132-158, vol. 58, No.2, August, 1999

Speculative Versioning Cache
Sridhar Gopal, T. N. Vijaykumar, J. E. Smith, and G. S. Sohi
Fourth International Symposium on High-Performance Computer Architecture (HPCA-4), pages 195-205, February 1998. (accept 31 out of 141 submissions) Abstract
Journal version Speculative Versioning Cache in the IEEE Transactions on Parallel and Distributed Systems (TPDS), pages 1305-1317, vol. 12, No. 12, December 2001.

Dynamic Speculation and Synchronization of Data Dependences
Andreas I. Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
24th International Symposium on Computer Architecture (ISCA-24), pages 181-193, June 1997. (accept 30 out of 147 submissions) Abstract

Multiscalar Processors
G. S. Sohi, S. Breach, and T. N. Vijaykumar
22th International Symposium on Computer Architecture (ISCA-22), pages 414-425, June 1995. (accept 37 out of 180 submissions) Abstract Abstract (this paper is selected in the 25 years of ISCA - selected papers)

The Anatomy of the Register File in a Multiscalar Processor
S. Breach, T. N. Vijaykumar, and G. S. Sohi
27th Annual International Symposium on Microarchitecture (MICRO-27), pages 181-190, December 1994. (accept 27 out of 63 submissions) Abstract