Cheng-Kok Koh
Purdue University, West Lafayette, Indiana
School of Electrical and Computer Engineering
465 Northwestern Avenue
West Lafayette, Indiana 47907-2035
Phone: 765-496-3683
Fax: 765-494-6951
E-mail: 
Office: MSEE 254
Calendar
Research
My research interests lie in the general area of Computer Aided Design (CAD)
for Very Large-Scale Integration (VLSI):
- Modeling and analysis of large-scale systems
- Design of on-chip communications
- Physical design and synthesis
- Circuit design and synthesis
Research Projects
- Simulation of nano-scale transistors and wires (with Prof. Venkataramanan Balakrishnan,
funded by NASA NCC 2-1363)
- Reliable Clock Synthesis (with Prof. Venkataramanan Balakrishnan, funded by NSF 9984553-CCR, NSF 0203362-CCR, PRF and DAC Scholarship for Douglas Lam)
- Interconnect-driven floorplanning (funded by PRF)
- Interconnect Planning and Synthesis of Physical Layout for Deep Submicron VLSI Design (funded by NSF 9984553-CCR)
- Noise-Aware Floorplanning and Global Routing (with Prof. Kaushik Roy, funded by Intel)
- Multiple-Voltage Placement (with Prof. Patrick H. Madden, SUNY Binghamton, funded by SRC Task 947-001)
- Logic and Physical Synthesis (funded by NSF 9984553-CCR)
- Reduced Order Modeling of RLC Networks (with Prof. Venkataramanan Balakrishnan, funded by PRF, SRC 99-TJ-689, and NSF 9984553-CCR)
- Operation and Monitoring of Power Grid with Dynamic Equivalents and State Estimation (with Prof. Chee-Mun Ong (PI) and Prof. Venkataramanan Balakrishnan, funded by Center for Security of Large Scale Systems)
- On-Chip RLC Interconnect Synthesis (with Prof. Kaushik Roy, funded by SRC 99-TJ-689) (completed)
Teaching
For the most updated list of courses that we offer in the area of VLSI and
circuit design, please visit the
VC Course Webpage
.
Web sites