Institute of Chips and AI
(Invitation Only)
Tuesday, November 19, 2024
8:30 AM - 5:30 PM
Computer History Museum
1401 N Shoreline Blvd
Mountain View, California 94043
Agenda
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Speaker Bios
Click speaker name highlighted below to view their bio.
- Rob Aitken, CHIPS R&D Office
- Vamsi Boppana, AMD
- Preeth Chengappa, Microsoft
- Barbara De Salvo, Meta
- Chetan Deshpande, MediaTek
- Sid Dhodhi, NVIDIA
- Pradeep Dubey, Intel
- Tom Horan, US Air Force
- Rajeev Jain, Qualcomm
- Mukesh Khare, IBM
- Emmett Kilgariff, NVIDIA
- Hoshik Kim, SK Hynix
- Ajit Manocha, SEMI
- Renu Mehra, Synopsys
- Partha Ranganathan, Google
- Naveed Sherwani, Primis AI
Rob Aitken

Program Manager, CHIPS R&D Office
Robert Aitken (F?13) received the Ph.D. degree from McGill University, Montréal, QC, Canada. He was with Agilent, Santa Clara, CA, USA, and HP, Palo Alto, CA, USA. He joined ARM Ltd., Cambridge, U.K., as part of its acquisition of Artisan Components in 2004. He is currently with the CHIPS R&D Office.
Vamsi Boppana

Senior Vice President of AI, AMD
Vamsi Boppana is senior vice president of the Artificial Intelligence Group at AMD. In this role, he is responsible for the Data Center AI GPU business as well as the cross-company AI strategy, driving the AI roadmap across client, edge, and cloud, and for the company's AI engines and AI software and ecosystem efforts.
Boppana earned a Bachelor of Technology, with honors, in computer science and engineering from the Indian Institute of Technology, Kharagpur, and Master of Science and doctorate degrees in electrical engineering from the University of Illinois at Urbana-Champaign. The author and co-author of more than 40 technical papers, he has received six patents for his designs.
Preeth Chengappa

Head of Industry, Microsoft
Preeth Chengappa leads Industry ecosystem engagements for Semiconductors and EDA at Microsoft. He brings 25+ years of corporate and startup experience, including over a decade of efforts to bring cloud based solutions to the industry on a common platform. He has deep industry relationships and program implementation expertise working across commercial and government entities, including fabless companies, EDA tool vendors and fabs/foundries. In addition to industry, Preeth represents Microsoft on the US CHIPS Act, EU and other nations' equivalents and government policy around semiconductors. He is currently focused on bringing GenAI to the semiconductor industry.
Barbara De Salvo

Director of Research, Meta
Barbara De Salvo is Director of Research at Meta Reality Labs Research (USA), responsible for Silicon Strategy and Foundry Engineering. She influences topnotch semiconductor companies and academia to define the most optimized semiconductor technologies that will enable Meta?s next generation of human-machine-interface, the new Augmented Reality/Virtual Reality (AR/VR) platforms which combine virtual and real worlds to explore the limits of human experience. She leads a multi-disciplinary team, including technologists, Asic designers, Machine Learning (ML) algorithm-, Computer Vision- scientists, and system engineers to drive the introduction of novel semiconductor technologies and new computing paradigms (as Compute-In-Memory, On-Sensor-Compute) in next generation AR/VR product systems.
Chetan Deshpande

Deputy Director, MediaTek USA
Chetan has been with MediaTek since 2015 and is in-charge of embedded memory solutions for MediaTek's flagship SoC's, AI accelerators and Enterprise ASICs. His team is working on developing custom and specialized memories for AI accelerators in mobile SoC's and Enterprise ASICs targeting data center cloud applications. He holds an MS degree in Computer Science from GeorgiaTech and an MS in EE from Colorado State University.
Sid Dhodhi

GenAI, Hardware Engineering, NVIDIA
Sid Dhodhi works on the functional verification of GPU designs at Nvidia, overseeing multiple verification teams. Aside from contributing to numerous GPU tape outs over the years he has worked on integrating AI/ML methodologies to tackle conventional DV challenges. Sid is currently spearheading the deployment of ChipNemo at Nvidia, aiming to leverage LLMs to boost productivity of engineers. He holds a master?s degree in electrical engineering from USC and graduated from Stanford GSB?s LEAD program with a focus on product design and thinking.
Pradeep Dubey

Intel Senior Fellow, Intel Corporation
Pradeep K. Dubey is an Intel Senior Fellow and director of the Parallel Computing Lab, a part of the Intel Labs organization at Intel Corporation. He leads a team of top researchers focused on state-of-the-art research in parallel computing. Dubey and his team are responsible for defining computer architectures that can efficiently handle emerging machine learning/artificial intelligence, traditional HPC applications for data-centric computing environments, and deriving product differentiation opportunities for Intel's CPU and GPU processing platforms. Dubey previously worked at IBM's T.J. Watson Research Center. Dubey has made significant contributions to the design, architecture and application performance of various microprocessors, including the IBM Power PC, the Intel386™, Intel486™, Intel® Pentium®, and Intel Xeon® processors. He holds 36 patents and has published more than 100 peer-reviewed technical papers. In 2012, Dubey was honored with an Intel Achievement Award for breakthroughs in parallel computing research, and was honored with Outstanding Electrical and Computer Engineer Award from Purdue University in 2014. Dubey holds a Ph.D. in electrical engineering from Purdue University. He is a Fellow of IEEE and also an ACM Fellow.
Tom Horan
AI/ML Portfolio Director, US Air Force (DIU)
Tom Horan is the Director of the Artificial Intelligence and Machine Learning portfolio at the Defense Innovation Unit. In this role, he oversees and leads efforts to drive technological innovation and outpace adversaries by developing and deploying cutting-edge AI/ML and data-driven solutions. He earned an undergraduate degree in Aeronautical & Astronautical Engineering from Purdue University in 2008 and also holds graduate degrees in Systems Engineering and Military Operational Art & Science. Tom's background prior to DIU is as an Air Force pilot.
Rajeev Jain

Senior Director Technology, Qualcomm & Professor Emeritus, UCLA
Rajeev Jain received his B. Tech in EE from IIT Delhi in 1978 and Ph.D. in EE from K.U. Leuven in 1985. He leads ML R&D; for SoC design at Qualcomm Inc. He has done research in CAD and IC design at Siemens, IMEC, UC Berkeley, UCLA (where he is currently Professor Emeritus). In 1999 he was elected IEEE Fellow for his contributions to Computer-Aided Design Tools for Signal Processing Circuits. At Qualcomm he also led the research in low-power Machine Learning architectures for sensing for which he and his team of co-inventors were awarded a US patent.
Mukesh Khare

GM, IBM Semiconductors and VP, Hybrid Cloud Research
Dr. Mukesh V. Khare is General Manager of IBM Semiconductors division and Vice President of Hybrid Cloud Research. He leads a global team of more than 1500 researchers and engineers that are re-defining the future of computing for next generation workloads such as generative artificial intelligence, high-performance computing, and their delivery via hybrid multi cloud. His research agenda includes semiconductor process technology, chip design for accelerated computing, system architecture and hybrid cloud software. Throughout his career, Dr. Khare has built and driven collaborative research alliances that lead to breakthrough advances in computing, such as 7nm and 2nm chip technologies. In 2019, he championed the formation of the AI Hardware Center, a $2.3B initiative and in 2023 a $10B initiative to create a High NA EUV research center through a public-private partnership at the Albany Nanotech Complex. He serves on the Board of the Semiconductor Research Corporation (SRC), which manages more than $100 million in funding for the university research as well as key academic-consortium boards such as Purdue and State University of New York. Mukesh was the recipient of the Asian American Executive of the year award in 2021 and the SEMI Sustainability Excellence Award in 2023. He is also an industrial advisor to the US Department of Commerce and the India Semiconductor Mission on their CHIPS Acts. Mukesh was awarded the IIT Bombay Distinguished Alumnus Award in 2024 for his contributions in the corporate world. Dr. Khare served as the General Chair of the 2018 Symposia on VLSI Technology, has co-authored more than 100 research papers and holds many U.S. and international patents. Dr. Khare is a recipient of an IBM Corporate Award, IBM's highest technical award for his leadership in delivering innovative technologies and is also an IBM Distinguished Engineer. He holds a Master of Technology from IIT Bombay and a Doctorate in Electrical Engineering from Yale University. He is a strong advocate of diversity and inclusion in the workplace, and sponsors initiatives such as PowerUp for women engineers.
Emmett Kilgariff

Vice President, GPU Architecture, Nvidia
Emmett Kilgariff graduated from Purdue with a bachelor's degree in 1980, and spent most of the 1980s working in many different areas of electronics. At Goodyear Aerospace, Mr. Kilgariff worked on satellite ground stations, switching power supplies, embedded processors, firmware, and laser photo recorders. At Motorola Microsystems, Mr. Kilgariff designed VME cards used for industrial automation and networking. While at Parallan, a Silicon Valley startup no longer around, Mr. Kilgariff developed early network servers. At Sun, Mr. Kilgariff caught the computer graphics bug and has been working on designing computer graphics hardware ever since. Mr. Kilgariff developed graphics processors at Sun, a couple of now defunct startups, Silicon Graphics and 3dfx.
In 2001, Mr. Kilgariff joined NVIDIA and has been Vice President of GPU Architecture since 2005. Mr. Kilgariff and his team have been responsible for many of NVIDIA?s GPU architectures, shipping hundreds of millions of GPUs. Mr. Kilgariff holds 43 patents with many more pending.
Hoshik Kim

Vice President & Fellow, Memory Systems Research, SK Hynix
Hoshik Kim is Vice President and Fellow of Memory Systems Research at SK hynix, where he leads research and pathfinding activities in memory systems architecture and software solution for various application domains. His current research interests focus on next-generation memory solutions architecture, which include CXL memory expansion, memory tiering, memory pooling and near-memory processing for AI and HPC systems. Prior to joining SK hynix, he worked for Intel Corporation and LG Electronics where he gained broad experiences in architecture, design, verification and electronic design automation (EDA) for microprocessors, system-on-chips (SoC) and intellectual properties (IP).
Ajit Manocha

President and CEO, SEMI
Ajit Manocha has been a champion of semiconductor industry collaboration as a critical means of advancing technology for societal and economic prosperity. His four decades of industry experience gives him unique insights into the evolution of key trends and the concerns and priorities of member companies and their executives.
In his role as the president and CEO of SEMI, Manocha has broadened the association?s scope to serve the semiconductor and electronics manufacturing and design supply chain with an expanded range of offerings and member value. He has driven SEMI to fuel industry growth and foster collaboration on challenges such as geopolitical and sustainability concerns, the talent gap, and supply chain disruptions.
Renu Mehra

Vice President of Engineering, Synopsys
Dr. Renu Mehra is VP Engineering in the IP Group at Synopsys leading Digital Methodologies. Previously, she led R&D teams for Design Compiler®, Fusion compiler front-end, RTL Architect and UPF. She had technical contributions on a variety of topics including logic synthesis, low power, clock gating, UPF, mux optimization, constraint management, and high level languages. Renu has a record of working across teams on various initiatives including the successful Synopsys-wide UPF initiative and Static aware synthesis flow.
Renu serves on the Executive Committees for the Design Automation Conference (DAC) and the International Symposium for Low Power Electronics and Design. Renu has Ph.D. and Masters degrees from the University of California at Berkeley and a Bachelor degree from the Indian Institute of Technology at Kanpur. She received the Distinguished Alumnus Award from IIT Kanpur in 2023, the Marie Pistilli Women in Electronic Design Award in 2021 and the YWCA Tribute to Women Award in 2020.
Partha Ranganathan

Engineering Fellow/VP at Google, Google Cloud
Parthasarathy (Partha) Ranganathan is currently an Engineering Fellow/VP at Google where he is the area technical lead for hardware and datacenters, designing systems at scale. Prior to this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on systems and data centers. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely-used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, accelerators, and disaggregated and data-centric data centers. He has published extensively (including being the co-author on the popular "Datacenter as a Computer" textbook) is a co-inventor on more than 100 patents, and his work has often been featured in the popular press, including the New York Times, Wall Street Journal, San Francisco Chronicle, etc. Partha is also active in teaching (most recently at Stanford) and mentoring (e.g., Google TechAdvisors) and is active in the broader community (most recently serving on the executive team for ACM SIGARCH and his local school district foundation). He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award, Rice University's Outstanding Young Engineering Alumni award, and the IIT Madras distinguished alumni award. He is also a Fellow of the IEEE and ACM, and is currently on the board of directors for OpenCompute.
Naveed Sherwani

Chairman, CEO and Cofounder, Primis AI
Dr. Naveed is a seasoned semiconductor industry veteran with over 35 years of entrepreneurial, engineering, and management experience, is widely acclaimed for his pioneering work in ASIC and microprocessor design automation. With a track record of founding over fifteen silicon companies and securing $1B in funding across 15 rounds from top venture capital firms, he's a respected leader in the field. Naveed's achievements include being recognized as the leader of the 'Most Respected Private Semiconductor Company' five times by the GSA. His ongoing contributions continue to drive innovation in the industry.