Institute of Chips and AI

Speaker Bios

Charles Augustine

Circuit Design Engineer, NVIDIA Inc.

Charles Augustine is a Circuit Design Engineer at NVIDIA. Over roughly twenty years he has designed circuits that measure silicon — voltage droop monitors, current sensors, and on-die regulators — contributing to seven test chips across five process nodes. Before NVIDIA he was a research scientist at Intel's Circuit Research Lab. His published work includes an all-digital voltage droop monitor with 2.6 mV/bit resolution (Symposium on VLSI Circuits, 2023), a 22 nm graphics core with adaptive clocking (ISSCC, 2014), a synthesizable all-digital LDO in 10 nm (ISSCC, 2020), a unified retention and wake-up clamp for a 10 nm x86 core (Symposium on VLSI Circuits, 2021), and measurements of PVT and aging hold-time margins in 22 nm FinFET (IEDM, 2016). He received his Ph.D. in Electrical and Computer Engineering from Purdue University in 2011, advised by Prof. Kaushik Roy.

Nikhilesh Chawla

Associate Dean for Research and Ransburg Professor, Purdue University

Nikhilesh Chawla is the Associate Dean for Research and Innovation in the College of Engineering at Purdue University and Ransburg Professor in the School of Materials Engineering at Purdue University. He joined Purdue in 2020, after previously serving as Founding Director of the Center for 4D Materials Science and Fulton Professor of Materials Science and Engineering at Arizona State University. Prof. Chawla received his Ph.D. in Materials Science and Engineering from the University of Michigan in 1997. He was a postdoctoral fellow jointly at Ford Motor Company and the University of Michigan, and a senior development engineer at Hoeganaes Corporation. He has served as the inaugural Associate Dean for Engineering in Indianapolis, Acting Head of the School of Materials Engineering, and Co-Director of the Semiconductor Degree Programs at Purdue. Prof. Chawla?s research is in the area Four-Dimensional (4D) materials science with a particular emphasis on the deformation behavior of advanced materials at bulk and small length scales. He has co-authored over 320 refereed journal publications (Google Scholar h-index of 71) and over 620 presentations in these areas. He has close to 18,400 citations for his work. He is the author of the textbook Metal Matrix Composites (co-authored with K.K. Chawla), published by Springer.

Sumeet Gupta

Professor, Purdue University

Sumeet Kumar Gupta received the B. Tech. degree in Electrical Engineering from the Indian Institute of Technology, Delhi, India in 2006, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering from Purdue University, West Lafayette IN in 2008 and 2012, respectively. Dr. Gupta is a Professor of Electrical and Computer Engineering at Purdue University. Prior to this, he was an Assistant Professor of Electric Engineering at The Pennsylvania State University from 2014 to 2017 and a Senior Engineer at Qualcomm Inc. from 2012 to 2014. His research interests include neuromorphic computing, low power variation aware VLSI circuit design in emerging nanotechnologies, device-circuit co-design and nano-scale device modeling and simulations. He has published over 100 articles in refereed journals and conferences and is a member of IEEE and EDS. Dr. Gupta was the recipient of DARPA Young Faculty Award in 2016, an Early Career Professorship by Penn State in 2014 and the 6th TSMC Outstanding Student Research Bronze Award in 2012. He has also received Magoon Award and the Outstanding Teaching Assistant Award from Purdue University in 2007 and Intel PhD Fellowship in 2009.

Milind Kulkarni

Birck Head and Professor, Purdue University

Milind Kulkarni is the Michael and Katherine Birck Head of ECE and a Professor in the Elmore Family School of Electrical and Computer Engineering at Purdue University. His research focuses on Programming Languages and Compilers, with particular interests in developing languages, compilers, and runtime systems that enable efficient programming and high performance on emerging complex architectures. He is one of the founding members of the Center for Programming Principles and Software Systems, which brings together researchers in programming languages, formal methods, and software engineering, along with collaborators in fields such as artificial intelligence, security, and computational science, to address the grand challenges of building effective software systems. He is also a member of PurPL, the Purdue Programming Languages Research Group, and an affiliate of the Center for Resilient Infrastructures, Systems, and Processes (CRISP).

Chankyu Li

Senior Research Scientist, NVIDIA

Chankyu is a senior research scientist on NVIDIA's Applied Deep Learning Research team, where he focuses on advancing large language models and conducting post-training research. Previously, he was a large-scale machine learning engineer at Intel's Habana Labs, where he worked on AI performance optimization for MLPerf benchmarks. He was also a research intern at Nokia Bell Labs, developing functional modeling simulators for AI accelerators. He earned his Ph.D. in Electrical and Computer Engineering from Purdue University.

Siri Narla

Embedded NVM Technology Architect, Global Foundries

Siri Narla is a Technology Architect in the GFLabs organization at GLOBALFOUNDRIES, where she focuses on embedded memory and alternative computing technologies for Physical AI applications and leads the company's IGZO development program. She earned her Ph.D. and M.S. in Electrical and Computer Engineering from Georgia Tech under Prof. Azad Naeemi, where her research focused on NVM-based content addressable memory design for AI accelerators. She received her bachelor's degree in Electronics and Instrumentation Engineering from BITS Hyderabad in India.

Sang Phill Park

Architect, Oracle Cloud Infrastructure (OCI)

Sang Phill Park is an architect at Oracle Cloud Infrastructure (OCI), where he drives hardware product direction and new product introduction across CPU and GPU servers, AI accelerators, and storage systems. His work connects business priorities and customer requirements with long-term hardware strategy. He leads technical collaboration with silicon vendors and system partners to shape industry roadmaps and guide multiyear platform development. His experience spans silicon design, server architecture, and hyperscale hardware deployment and operations. Previously, he was a Principal Hardware Engineer at Amazon Web Services and held architecture and engineering leadership roles at Qualcomm and Intel. He holds a Ph.D. in electrical engineering from Purdue University.

Anand Raghunathan

Co-Director of Institute of Chips and AI and Silicon Valley Professor, Purdue University

Anand directs the Integrated Systems Laboratory in the School of Electrical and Computer Engineering at Purdue. His group's research spans various topics in VLSI and Computer Engineering, including System-on-chip design, domain-specific architecture, computing with nanoscale post-CMOS devices, and heterogeneous parallel computing. Before joining Purdue, Anand was a Senior Researcher at NEC Laboratories America and held a visiting position at the Department of Electrical Engineering, Princeton University.

Vijay Raghunathan

VP and University Ambassador to India and Professor , Purdue University

Vijay is a Professor in the School of Electrical and Computer Engineering at Purdue University, West Lafayette. He leads the Embedded Systems and IoT Lab (ESL), where their research focuses on hardware and software architectures for embedded systems, wireless sensors for the Internet of Things (IoT), and wearable and implantable electronics, with an emphasis on low power design (at the board-level as well as system-on-chip), micro-scale energy harvesting, emerging memory technologies, and reliable/secure system design.

Tim Rogers

Associate Professor, Purdue University

Academically, Tim is a computer architect. He studies the design of the hardware components that efficiently solve problems written in software. His research has been recognized with an NSF Career Award in 2020, an NVIDIA graduate fellowship in 2013, best paper nominations at MICRO 2012, PPoPP 2017, ISPASS 2021, and IISWC 2024, an IEEE Micro Top Picks in Computer Architecture in 2013, as a Communications of the ACM Research Highlight in 2014, and his PhD thesis was nominated for the Governor General of Canada's Gold Medal and the 2016 ACM Doctoral Dissertation Award. In 2024, he was inducted into the MICRO Hall of Fame. His teaching has been recognized with multiple Outstanding Engineering Teacher citations, the 2018 Ruth and Joel Spira Award for Excellence in Teaching, the 2020 Hesselberth Award for Teaching Excellence, and the 2022 College of Engineering Excellence in Early Career Teaching Award. He completed my PhD in Computer Architecture at the University of British Columbia in 2015. During the course of his PhD, he interned for the research divisions of both AMD and NVIDIA, where he worked on the design of future GPU computing microarchitectures. Prior to entering graduate school, he worked as a software engineer at Electronic Arts where he gained insight into how industrial software is really made.

Kaushik Roy

Director of Institute of Chips and AI and Tiedemann Jr. Distinguished Professor, Purdue University

Kaushik Roy is the Edward G. Tiedemann, Jr., Distinguished Professor of Electrical and Computer Engineering at Purdue University. He received his BTech from Indian Institute of Technology, Kharagpur, PhD from University of Illinois at Urbana-Champaign in 1990 and joined the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked for three years on FPGA architecture development and low-power circuit design. His current research focuses on cognitive algorithms, circuits and architecture for energy-efficient neuromorphic computing/ machine learning, and neuro-mimetic devices. Kaushik has supervised more than100 PhD dissertations and his students are well placed in universities and industry. He is the co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill).

Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, Purdue College of Engineering Research Excellence Award, Outstanding Mentor Award in 2021, Humboldt Research Award in 2010, 2010 IEEE Circuits and Systems Society Technical Achievement Award (Charles Desoer Award), IEEE TCVLSI Distinguished Research Award in 2021, Distinguished Alumnus Award from Indian Institute of Technology (IIT), Kharagpur, Fulbright-Nehru Distinguished Chair, DoD Vannevar Bush Faculty Fellow (2014-2019), SRC Aristotle Award in 2015, Purdue Arden L. Bement Jr. Award in 2020, SRC Innovation Award in 2022, honorary doctorate from Aarhus University in 2023, and best paper awards at 1997 International Test Conference, IEEE 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, 2003 IEEE Nano, 2004 IEEE International Conference on Computer Design, 2006 IEEE/ACM International Symposium on Low Power Electronics & Design, 2005 and 2019 IEEE Circuits and system society Outstanding Young Author Award (Chris Kim, Abhronil Sengupta), 2006 IEEE Transactions on VLSI Systems best paper award, 2012 ACM/IEEE International Symposium on Low Power Electronics and Design best paper award, 2013 IEEE Transactions on VLSI Best paper award. Dr. Roy was a Purdue University Faculty Scholar (1998-2003). He was a Research Visionary Board Member of Motorola Labs (2002) and held the M. Gandhi Distinguished Visiting faculty at Indian Institute of Technology (Bombay) and Global Foundries visiting Chair at National University of Singapore. He has been in the editorial board of IEEE Design and Test, IEEE Transactions on Circuits and Systems, IEEE Transactions on VLSI Systems, and IEEE Transactions on Electron Devices. He was Guest Editor for Special Issue on Low-Power VLSI in the IEEE Design and Test (1994) and IEEE Transactions on VLSI Systems (June 2000), IEE Proceedings -- Computers and Digital Techniques (July 2002), and IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2011). Dr. Roy is a fellow of IEEE.

Sandeep Thirumala

Senior Engineer - Advanced DRAM Process Integration, Micron Technology

Sandeep Krishna Thirumala completed his PhD from the School of Electrical and Computer Engineering at Purdue University, USA in 2020. He received his Bachelor's degree in Engineering Physics from the Indian Institute of Technology (IIT) Madras, India in 2016 and Master's degree in Electrical Engineering from The Pennsylvania State University, USA in 2018. He worked as an intern in the Technology Development division of Micron Technologies, USA in 2020. His primary research interest includes exploring emerging device technologies for next-generation computing workloads. His PhD thesis was titled "Enabling Logic-Memory Synergy using integrated non-volatile transistor technologies for energy-efficient computing" where he explored emerging technologies for logic and storage such as ferroelectrics, spintronics and complex-oxide electronics, processing-in-memory solutions for machine learning systems, and artificial intelligence hardware for edge and Internet-of-Things (IoT) computing. He has received several awards and accolades for his research including the best paper award in NANOARCH-2019 in Qingdao, China. He was also nominated for best paper award in DATE-2020 in Grenoble, France and ISLPED-2018 in Washington, USA. He was the recipient of the prestigious Bilsland Dissertation Fellowship, awarded by Purdue University in 2020 and the Merit scholarship for academic excellence, awarded by the Indian Institute of Technology Madras, India from 2012-2016. He is currently an Engineer at Micron Technologies, developing next-generation memory and storage systems.

Srividhya Venkataraman

Fellow Silicon Design Engineer, AMD

Srividhya Venkataraman is a Fellow with the CPU Cores Design team at AMD. In this role, she is responsible for developing and implementing design thermal solutions to improve silicon performance across product domains. Srividhya has a MSEE from Clemson University and has worked in the Semiconductor Industry for 25 years.

Swagath Venkataramani

Principal Research Scientist, IBM T.J Watson Research Center

Swagath Venkataramani is currently a research staff member at IBM T.J. Watson Research Center Yorktown Heights, NY. His research interests include hardware and software optimizations for machine/deep learning and approximate computing. He has a PhD in electrical and computer engineering from Purdue University. His research has received multiple best paper awards and nominations, and has been supported through prestigious fellowships. He is a member of the ACM.

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