Institute of Chips and AI

Speaker Bios

Ryan Carey

Principal Engineer, Qualcomm

Ryan Carey received the B.S. degree in biomedical engineering from Worcester Polytechnic Institute, Worcester, MA, USA, in 2005, and the M.S. and Ph.D. degrees in neuroscience from Boston University, Boston, MA, USA, in 2009 and 2012, respectively. He joined Qualcomm Technologies, Inc., San Diego, CA, USA, in 2013, where he currently serves as a Senior Staff Engineer. He worked on spiking neural networks, low-power processing of mobile sensor data, and has been granted eight U.S. patents. His research interests include application of machine learning to problems in computer-aided VLSI design and wireless networks.

Yiran Chen

John Cocke Distinguished Professor, Duke

Yiran Chen is the John Cocke Distinguished Professor of Electrical and Computer Engineering at Duke University. He serves as the Principal Investigator and Director of the NSF AI Institute for Edge Computing Leveraging Next Generation Networks (Athena) and Co-Director of the Duke Center for Computational Evolutionary Intelligence (DCEI). His research group focuses on innovations in emerging memory and storage systems, machine learning and neuromorphic computing, and edge computing. Dr. Chen has authored over 700 publications and holds 96 U.S. patents. His work has received widespread recognition, including two Test-of-Time Awards and 14 Best Paper/Poster Awards. He is the recipient of the IEEE Circuits and Systems Society's Charles A. Desoer Technical Achievement Award and the IEEE Computer Society's Edward J. McCluskey Technical Achievement Award. He also serves as the inaugural Editor-in-Chief of the IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI) and the founding Chair of the IEEE Circuits and Systems Society's Machine Learning Circuits and Systems (MLCAS) Technical Committee. Dr. Chen is a Fellow of the AAAS, ACM, IEEE, and NAI, and an ordinary member of the European Academy of Sciences and Arts.

Gary (Chinq-Shiun) Chiu

Director, MediaTek Technology, USA

Gary (Chinq-Shiun) Chiu is Director at MediaTek Technology, USA, leading the new West Lafayette, IN, design center as part of the Strategic Technology Exploration Platform (STEP). He has more than 20 years of IC industry experience as an IC designer, architect, technical lead, and team leader, focusing on digital-analog-RF IC design and AI/ML-assisted chip design and integration for next-generation wireless communication systems. At MediaTek, he has guided successful product development in 5G wireless transceivers, winning the MediaTek Innovation Awards in 2015 and 2020. Gary Chiu is instrumental in fostering university-industry collaboration through consortiums with Purdue and other leading academic partners, supporting innovation at the convergence of semiconductor technology and artificial intelligence. He has authored and co-authored multiple journal and conference papers, holds an EMBA from National Taiwan University, an M.S. in Electrical Engineering from National Taiwan University, and a B.S. from National Tsing Hua University.

Sumeet Gupta

Elmore Associate Professor, Purdue University

Sumeet Kumar Gupta received the B. Tech. degree in Electrical Engineering from the Indian Institute of Technology, Delhi, India in 2006, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering from Purdue University, West Lafayette IN in 2008 and 2012, respectively. Dr. Gupta is currently an Associate Professor of Electrical and Computer Engineering at Purdue University. Prior to this, he was an Assistant professor of Electric Engineering at The Pennsylvania State University from 2014 to 2017 and a Senior Engineer at Qualcomm Inc. from 2012 to 2014. His research interests include neuromorphic computing, low power variation aware VLSI circuit design in emerging nanotechnologies, device-circuit co-design and nano-scale device modeling and simulations. He has published over 100 articles in refereed journals and conferences and is a member of IEEE and EDS. Dr. Gupta was the recipient of DARPA Young Faculty Award in 2016, an Early Career Professorship by Penn State in 2014 and the 6th TSMC Outstanding Student Research Bronze Award in 2012. He has also received Magoon Award and the Outstanding Teaching Assistant Award from Purdue University in 2007 and Intel PhD Fellowship in 2009.

Kunhyuk Kang

Corporate Vice President, Samsung

Kunhyuk holds 18 years of professional career in Design Automation, Methodology Development, and Technology Enablement. Currently with Samsung System LSI, for the last 3 years, he led central engineering team in charge of design methodology (DM), foundation IP development, technology enablement and external Foundry/EDA engagements. From 2025, he is in charge of GPU Implementation and advanced-node DTCO for Samsung Foundry Technology.

Hai "Helen" Li

Marie Foote Reel Distinguished Professor, Duke

Hai (Helen) Li is the Marie Foote Reel E'46 Distinguished Professor and Department Chair of the Electrical and Computer Engineering Department at Duke University. She received her B.S. and M.S. from Tsinghua University and her Ph.D. from Purdue University. Her research interests include neuromorphic circuits and systems for brain-inspired computing, machine learning acceleration and trustworthy AI, conventional and emerging memory design and architecture, and software and hardware co-design. Dr. Li served/serves as the Associate Editor-in-Chief and Associate Editor for multiple IEEE and ACM journals. She was the General Chair or Technical Program Chair of numerous IEEE/ACM conferences and the Technical Program Committee member of over 30 international conference series. Dr. Li is a Distinguished Lecturer of the IEEE CAS Society and a Distinguished Speaker of ACM. Dr. Li is a recipient of the IEEE Edward J. McCluskey Technical Achievement Award, Ten Year Retrospective Influential Paper Award from ICCAD, TUM-IAS Hans Fischer Fellowship from Germany, ELATE Fellowship, nine best paper awards, and another ten best paper nominations. Dr. Li is a fellow of ACM, IEEE, and NAI.

Vijaykrishnan Narayanan

Evan Pugh Professor and A. Robert Noll Chair Professor, Penn State

Vijaykrishnan Narayanan is the Evan Pugh Professor and A. Robert Noll Chair Professor of Computer Science & Engineering and Electrical Engineering. Vijay also serves as Associate Dean for Innovation at the Pennsylvania State University. Vijay also serves as co-director of the Microsystems Design Lab and Penn State Center for Artificial Intelligence Foundations and Engineering Systems.

Vijay's research has focused on computer architecture, including power-aware systems, application-specific systems, on-chip networks, emerging technologies, and reliable design and design automation. Vijay is a co-director of the Microsystems Design Lab. He is a Fellow of the National Academy of Inventors, IEEE and ACM.

Chirag Patel

Sr. Director, AI Product Management, Qualcomm

Dr. Chirag Patel is a Senior Director of AI Product Management at Qualcomm, based in San Diego, USA. He spearheads the GenAI technology and AI accelerator (NPU) product portfolio for on-device AI, defining vision, planning and roadmap execution with emphasis on end to end system analysis, design and optimization.

Previously, Dr. Patel led the applied R&D efforts at Qualcomm AI Research, where he was instrumental in bringing neural network model efficiency R&D; on quantization & compression to commercialization. He and his team's work was the foundation for deploying generative AI models on edge devices, leading to several world's first demos and commercialization on smartphones worldwide. Additionally, he directed projects aimed at enhancing smartphone user experiences through the integration of machine learning and low-power, always-on sensors, alongside other pioneering technologies.

Before pivoting to AI, Dr. Patel accumulated over a decade of experience in wireless communications, serving as a research engineer and technical lead. His contributions included the design and standardization of standalone LTE in unlicensed spectrum and 3G/4G/5G small cell technologies.

Dr. Patel holds a Ph.D. in Electrical Engineering from the Georgia Institute of Technology in Atlanta.

Anand Raghunathan

Silicon Valley Professor, Purdue University

Anand directs the Integrated Systems Laboratory in the School of Electrical and Computer Engineering at Purdue. His group's research spans various topics in VLSI and Computer Engineering, including System-on-chip design, domain-specific architecture, computing with nanoscale post-CMOS devices, and heterogeneous parallel computing. He is currently Chair of the VLSI area in the School of ECE. Before joining Purdue, Anand was a Senior Researcher at NEC Laboratories America and held a visiting position at the Department of Electrical Engineering, Princeton University.

Vijay Raghunathan

VP for Global Partnerships and Programs, Director of Semiconductor Education, Professor, Purdue University

Vijay is a Professor in the School of Electrical and Computer Engineering at Purdue University, West Lafayette. He leads the Embedded Systems and IoT Lab (ESL), where their research focuses on hardware and software architectures for embedded systems, wireless sensors for the Internet of Things (IoT), and wearable and implantable electronics, with an emphasis on low power design (at the board-level as well as system-on-chip), micro-scale energy harvesting, emerging memory technologies, and reliable/secure system design.

Tim Rogers

Associate Professor, Purdue University

Academically, Tim is a computer architect. He studies the design of the hardware components that efficiently solve problems written in software. His research has been recognized with an NSF Career Award in 2020, an NVIDIA graduate fellowship in 2013, best paper nominations at MICRO 2012, PPoPP 2017, ISPASS 2021, and IISWC 2024, an IEEE Micro Top Picks in Computer Architecture in 2013, as a Communications of the ACM Research Highlight in 2014, and his PhD thesis was nominated for the Governor General of Canada?s Gold Medal and the 2016 ACM Doctoral Dissertation Award. In 2024, he was inducted into the MICRO Hall of Fame. His teaching has been recognized with multiple Outstanding Engineering Teacher citations, the 2018 Ruth and Joel Spira Award for Excellence in Teaching, the 2020 Hesselberth Award for Teaching Excellence, and the 2022 College of Engineering Excellence in Early Career Teaching Award. He completed my PhD in Computer Architecture at the University of British Columbia in 2015. During the course of his PhD, he interned for the research divisions of both AMD and NVIDIA, where he worked on the design of future GPU computing microarchitectures. Prior to entering graduate school, he worked as a software engineer at Electronic Arts where he gained insight into how industrial software is really made.

Kaushik Roy

Edward G. Tiedemann, Jr., Distinguished Professor, Purdue University

Kaushik Roy is the Edward G. Tiedemann, Jr., Distinguished Professor of Electrical and Computer Engineering at Purdue University. He received his BTech from Indian Institute of Technology, Kharagpur, PhD from University of Illinois at Urbana-Champaign in 1990 and joined the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked for three years on FPGA architecture development and low-power circuit design. His current research focuses on cognitive algorithms, circuits and architecture for energy-efficient neuromorphic computing/ machine learning, and neuro-mimetic devices. Kaushik has supervised more than100 PhD dissertations and his students are well placed in universities and industry. He is the co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill).

Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, Purdue College of Engineering Research Excellence Award, Outstanding Mentor Award in 2021, Humboldt Research Award in 2010, 2010 IEEE Circuits and Systems Society Technical Achievement Award (Charles Desoer Award), IEEE TCVLSI Distinguished Research Award in 2021, Distinguished Alumnus Award from Indian Institute of Technology (IIT), Kharagpur, Fulbright-Nehru Distinguished Chair, DoD Vannevar Bush Faculty Fellow (2014-2019), SRC Aristotle Award in 2015, Purdue Arden L. Bement Jr. Award in 2020, SRC Innovation Award in 2022, honorary doctorate from Aarhus University in 2023, and best paper awards at 1997 International Test Conference, IEEE 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, 2003 IEEE Nano, 2004 IEEE International Conference on Computer Design, 2006 IEEE/ACM International Symposium on Low Power Electronics & Design, 2005 and 2019 IEEE Circuits and system society Outstanding Young Author Award (Chris Kim, Abhronil Sengupta), 2006 IEEE Transactions on VLSI Systems best paper award, 2012 ACM/IEEE International Symposium on Low Power Electronics and Design best paper award, 2013 IEEE Transactions on VLSI Best paper award. Dr. Roy was a Purdue University Faculty Scholar (1998-2003). He was a Research Visionary Board Member of Motorola Labs (2002) and held the M. Gandhi Distinguished Visiting faculty at Indian Institute of Technology (Bombay) and Global Foundries visiting Chair at National University of Singapore. He has been in the editorial board of IEEE Design and Test, IEEE Transactions on Circuits and Systems, IEEE Transactions on VLSI Systems, and IEEE Transactions on Electron Devices. He was Guest Editor for Special Issue on Low-Power VLSI in the IEEE Design and Test (1994) and IEEE Transactions on VLSI Systems (June 2000), IEE Proceedings -- Computers and Digital Techniques (July 2002), and IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2011). Dr. Roy is a fellow of IEEE.

Steve Soss

Fellow, Research & Development, GlobalFoundries

Steven Soss is a Fellow in Research & Development at GLOBALFOUNDRIES, where he serves as the eNVM Technical Architect within GF Labs. Based in Malta, NY, Steven leads innovation in embedded memory technologies, including STT-MRAM and OxRAM, with a focus on reliability, scalability, and system-level integration. He is a recognized expert in semiconductor memory systems, a frequent invited speaker, and a contributor to leading industry conferences such as IRPS and IEDM. Steven received his PhD in Physics from Rensselaer Polytechnic Institute.

Mary Ann White

Senior Director, Product Management, Synopsys

Mary Ann White is a Senior Director of Product Management at Synopsys, with over 40 years of experience in the EDA and semiconductor industries. Mary Ann holds a B.S. in Electrical Engineering and Computer Sciences from UC Berkeley and plays a key role in driving RTL synthesis innovation at Synopsys.

Cole Zemke

Distinguished Member, Technical Staff, GlobalFoundries

Cole Zemke serves as a Distinguished Member of Technical Staff at GlobalFoundries, where he leads a global organization responsible for providing critical services that support semiconductor design, including automation, infrastructure, methodology, and ecosystem partnerships. Prior to this role, Cole held leadership positions in Process Design Kit (PDK) enablement at both GlobalFoundries and IBM, focusing on automation, electrical verification, and reliability. He holds a Bachelor of Science and a Master of Science in Electrical Engineering from the University of Illinois at Urbana-Champaign.

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