ECE 559 MOS VLSI Design (Fall 2009)
Electrical and Computer Engineering Department, Purdue University, West Lafayette, Indiana, USA
12:00-01:15 PM - Tuesday and Thursday, Room : EE 115
Offered every Fall semester, Instructor : Prof. Kaushik Roy
An introduction to most aspects of large scale MOS integrated circuit design including: device scaling and modelling,
useful circuit building blocks, system considerations, and algorithms to accomplish common tasks.
Most circuits discussed are treated in detail with particular attention given to those circuits,
whose regular and/or expandable structures are primary candidates for integration.
All circuits will be digital and will be considered in the context of the silicon MOS enhancement/depletion technology.
Homeworks will require the use of existing IC mask layout software and term project will be assigned.
A student who successfully fulfills the course requirements will have demonstrated:
- An ability to analyze MOS circuits
- An ability to synthesize MOS circuits
- Experience in oral presentation, teamwork, and document preparation for a finished design
- An ability to create and simulate a hierarchical digital design using commercial grade CAD software
Instructor : Prof. Kaushik Roy
Office: MSEE 232
Office Hours: 11:00 am to 12:00 noon - Tuesday and Thursday (or by appointments)
TA : Kuntal Roy
Office: EE 20
Office Hours: 03:50 pm to 05:50 pm - Monday and Wednesday (at POTR 360)