Research

Compute-in-Memory (CIM) Chips

AI, we have a "memory" problem. New computing architectures and chip designs that make more intelligent use of new memory technologies are key to unlocking extreme energy efficiency. We push the frontier of compute-in-memory AI chips through co-designs and prototyping.

Neuro-Symbolic (NeSy) Computing

NeSy computing combine human-like symbolic learning and reasoning with hierarchical, context-based neural representations, promising more robust and efficient AI. We work on novel designs and hardware implementations for NeSy computing systems. We published one of the earliest hardware demonstrations (HD computing) back in 2016.

AI Hardware-Algorithm Co-Design

To scale AI models for muti-modal, life-long learning scenarios, the underlying hardware must take a key role in shaping the design of hardware-aware model architectures and learning algorithms, with inspirations from neuroscience.

CMOS+X Nanokernels and Nanosystems

3D integration of new nanotechnologies and silicon CMOS enables energy- and area-efficient implementations of new compute kernels and system-on-chips. These building blocks can be further packaged into heterogeneous systems for heterogeneous applications.

HPC-at-Edge: Heterogeneous Chiplets

Co-design of heterogeneous silicon and BEOL-augmented silicon chiplets with 3D integration leads towards high-performance computing at the edge.