Mimicking neural and synaptic computations by spintronic devices
Spin devices for Non-Boolean Computing
Emerging spin-devices like spin-valves and domain-wall magnets (DWM) have opened new avenues for spin-based logic design. Extensive efforts have been directed towards evolution of computation schemes that can exploit such devices for energy efficient computation. Ultra-low voltage, current-mode operation of magneto-metallic spin-torque devices can potentially be suitable for non-Boolean computation schemes like, neural networks, which involve analog processing. Thus, there is a need to explore cross-hierarchy-coherent computation paradigm that can exploit the benefits of spin-based devices while compensating for their limitations. This may include evolving hybrid design schemes, where charge-based devices supplement the spin-devices, to gain large benefits at system level. As an example, lateral spin valves (LSV) involve switching of nano-magnets using spin-polarized current injection through a metallic channel such as Cu. Such spin-torque based devices possess several interesting properties that can be exploited for ultra low power computation. Analog characteristic of spin current facilitate non-Boolean computation like majority-evaluation that can be used to model a neuron. The magneto-metallic neurons can operate at ultra low terminal voltage of ~100mV, thereby resulting in small computation power. Recently research efforts are being directed to develop spintronic device structures that can mimic the functionality of biological synapses. Such low-power, hybrid designs can be suitable for various data processing applications like cognitive computing, associative memory, Boolean/non-Boolean logic and analog and digital signal processing. Simulation results for these applications based on device-circuit co-simulation framework predict several orders of magnitude improvement in computation energy as compared to state of art CMOS design.
- M. Sharad, C. Augustine, G. Panagopoulos and K. Roy, “Spin Based Neuron-Synapse Unit for Ultra Low Power Programmable Computational Networks”, IEEE International Joint Conference on Neural Networks, 2012.
- M. Sharad, C. Augustine, G. Panagopoulos, and K. Roy, "Cognitive Computing with Spin-Based Neural Networks," ACM/IEEE Design Automation Conference, June 2012.
- M. Sharad, G. Panagopoulos, and K. Roy, "Spin-Neuron for Ultra Low Power Computational Hardware," Device Research Conference, June 2012. (Invited Paper)
- M. Sharad G. Panagopoulos, C. Augustine, and K. Roy, "Ultra Low Energy Analog Image Processing Using Spin Based Neurons," NANOARCH 8th ACM/IEEE International Symposium on Nanoscale Architectures, July 2012, Amsterdam.
- M. Sharad, C. Augustine, and K. Roy, "Boolean and Non-Boolean Computing with Spin Devices," International Electron Devices Meeting (IEDM), December 2012. (Invited Paper)
- M. Sharad, C. Augustine, G. Panagopoulos, and K. Roy. "Proposal for neuromorphic hardware using spin devices.", TECHCON 2012, arXiv preprint arXiv:1206.3227 (Highlighted in MIT Technology Review)
- M. Sharad, C. Augustine, G. Panagopoulos, and K. Roy, "Spin-Based Neuron Model with Domain Wall Magnets as Synapse," IEEE Transactions on Nanotechnology, July 2012, pp. 843-853.
- M. Sharad, K. Yogendra, K-W. Kwon, and K. Roy, "Design Of Ultra High Density And Low Power Computational Blocks Using Nano-Magnets," IEEE International Symposium on Quality of Electronic Design (ISQED), March 2013.
- M. Sharad, D. Fan, and K. Roy, "Ultra Low Power Computing With Resistive Crossbar Nets Using Spin Neurons," IEEE/ACM Design Automation Conference (DAC), June 2013.
- K. Roy , M. Sharad, D. Fan, K. Yogendra, "Beyond Charge-Base Computing : Boolean and Non boolean Computing Using spin Devices", ISLPED, 2013. (invited tutorial)
- K. Roy , M. Sharad, D. Fan, K. Yogendra, "Exploring Boolean and Non Boolean Computing Using Spin torque Switches", ICCAD, 2013. (invited tutorial)
- M. Sharad, D. Fan, and K. Roy, "Energy Efficient Non-Boolean Computing Using Spin Neurons and Memristors", IEEE Transaction on Nanotechnology, 2013
- M. Sharad, and K. Roy, "Dual-Pillar Spin-Torque Oscillator for Energy Efficient Computation”, Nanoarch, 2013
- M. Sharad and Kaushik roy, "Ultra Low Energy Analog Computing Using Spin Devcies", SRC TECHCON, 2013
- M. Sharad and K. Roy, “Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers”, Journal of Applied Physics, 2013
- M. Sharad, D. Fan, K. Yogendra, K. Roy, “Ultra-Low Power Neuromorphic Computing with Spin-Torque Devices”, Berkeley Symposium on Energy Efficient Electronic Systems, 2013
- M. Sharad, D. Fan, K. Yogendra, K. Roy, “Energy-Efficient and Robust Associative Computing with Electrically Coupled Dual Pillar Spin-Torque Oscillators”, Journal of Applied Physics (submitted), 2013
- M. Sharad, K. Yogendra and K. Roy, “ Dual-Pillar Spin-Torque Oscillator for Energy Efficient Computation”, Applied Phys. Lett, 2013
- S. G. Balasubramaniam, R. Venkatesan, M. Sharad, K. Roy, Anand Raghunathan, "SPIntronic Deep Learning Engine for Large-scale Neuromorphic Computing" ISLPED, 2014.
- S. G. Balasubramaniam, R. Venkatesan, M. Sharad, K. Roy, Anand Raghunathan, "SPINDLE: SPINtronic Deep Learning Engine for Large-scale Neuromorphic Computing", ACM JETC, 2014.
- A. Sengupta, S. H. Choday, Y. Kim, K. Roy, "Spin Orbit Torque Based Electronic Neuron", Applied Physics Letters, 2015.
- A. Sengupta, Z. Al Azim, X. Fong, K. Roy, "Spin-Orbit Torque Induced Spike-Timing Dependent Plasticity", Applied Physics Letters, 2015. (Editor's Picks)
- A. Sengupta, K. Roy, "Spin-Transfer Torque Magnetic Neuron for Low Power Neuromorphic Computing", IJCNN 2015.
- D. Fan, Y. Shim, A. Raghunathan, K. Roy, "STT-SNN: A Spin-Transfer Torque Based Soft-Liminting Non-Linear Neuron for Low-Power Artificial Neural Networks", IEEE Transactions on Nanotechnology, 2015.
- A. Sengupta, K. Yogendra, D. Fan, K. Roy, "Prospects of Efficient Neural Computing with Arrays of Magneto-metallic Neurons and Synapses", ASP-DAC 2016. (Invited Paper)
- A. Sengupta, P. Panda, A. Raghunathan, K. Roy, "Neuromorphic Computing Enabled By Spin-Transfer Torque Devices", VLSID 2016. (Tutorial Paper)
- A. Sengupta, K. Yogendra, K. Roy, "Spintronic Devices for Ultra-low Power Neuromorphic Computation", ISCAS 2016. (Invited Paper)
- A. Sengupta, B. Han, K. Roy, "Spin-Based Neuromimetic Computing: Deep Spiking Neural Systems", SRC TECHCON 2016.
- A. Sengupta, Y. Shim, K. Roy, "Proposal for an All-Spin Artificial Neural Network: Emulating neural and synaptic functionalities through domain wall motion in ferromagnets", IEEE Transactions on Biomedical Circuits and Systems, 2016 (In Press).
- A. Sengupta, K. Roy, "Short-Term Plasticity and Long-Term Potentiation in Magnetic Tunnel Junctions: Towards Volatile Synapses", Physical Review Applied, 2016.
- A. Sengupta, P. Panda, P. Wijesinghe, Y. Kim, K. Roy, "Magnetic Tunnel Junction Mimics Stochastic Cortical Spiking Neurons", Scientific Reports, 2016.
- A. Sengupta, M. Parsa, B. Han, K. Roy, "Probabilistic Deep Spiking Neural Systems Enabled by Magnetic Tunnel Junction", IEEE Transactions on Electron Devices, 2016.
- G. Srinivasan, A. Sengupta, K. Roy, "Magnetic Tunnel Junction Based Long-Term Short-Term Stochastic Synapse for a Spiking Neural Network with On-Chip STDP Learning", Scientific Reports, 2016.
- D. Fan, M. Sharad, A. Sengupta, K. Roy, "Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing", IEEE Transactions on Neural Networks and Learning Systems, 2016.
- A. Sengupta, K. Roy, "A Vision for All-Spin Neural Networks: A Device to System Perspective", IEEE Transactions on Circuits and Systems-I: Regular Papers, 2016. (ISCAS 2016 Special Issue)
- A. Sengupta, A,Banerjee, K. Roy, "Hybrid Spintronic-CMOS Spiking Neural Network With On-Chip Learning: Devices, Circuits and Systems", Physical Review Applied, 2016. (Featured in MIT Technology Review: Emerging Technology from arXiV and DoD R&E Science and Technology News Bulletin)
- A. Sengupta, B. Han, K. Roy, "Toward a Spintronic Deep Learning Spiking Neural Processor", BioCAS 2016.
- G. Srinivasan, A. Sengupta, K. Roy, "Magnetic Tunnel Junction Enabled All-Spin Stochastic Spiking Neural Network", DATE 2017. (Invited Paper)