Postdocs
Anubha Gogia
Anubha Gogia is a Postdoctoral Researcher in the School of Electrical and Computer Engineering at Purdue University, where she works under the joint supervision of Professor Kaushik Roy and Professor Anand Raghunathan with an Institute for Physical AI (IPAI) Fellowship. She received her Ph.D. in Electronics and Communication Engineering from the Indian Institute of Technology Roorkee (IIT Roorkee), India, in 2025. She also holds an M.Tech. in VLSI Design from Thapar Institute of Engineering and Technology, India, awarded in 2020, and a B.Tech. in Electronics and Communication Engineering from Punjabi University, India, awarded in 2018. Her research interests include spintronic devices, compute-in-memory architectures, energy-efficient AI hardware, and on-chip learning. She specializes in the design of low-power, high-performance neuromorphic and AI hardware based on emerging non-volatile memory technologies, particularly spin-orbit torque magnetic random-access memory (SOT-MRAM). She has also served as a visiting researcher at TU Delft in the Netherlands under the SPARC program, supported by the Ministry of Education, Government of India. Her research contributions span device-circuit-architecture co-design for scalable, non-volatile, and energy-efficient hardware platforms for next-generation edge-AI and neuromorphic computing systems.
Revanth Koduru
Revanth Koduru is a postdoctoral researcher holding a joint appointment between imec USA and Purdue University under the guidance of Prof. Kaushik Roy. He earned his Ph.D. in Electrical and Computer Engineering from Purdue University in December 2025. His doctoral research concentrated on physics-based multi-grain phase-field models of hafnium-zirconium-oxide ferroelectric devices, providing critical insights into their fundamental physical mechanisms and device properties. His current research focuses on Device-Technology Co-Optimization (DTCO) and System-Technology Co-Optimization (STCO) frameworks. Specifically, he investigates the hardware acceleration of artificial intelligence workloads and large language models (LLMs). His approach focuses on optimizing emerging memory technologies and their integration into advanced computing architectures via 3D bonding and monolithic integration.
