msepostdoc-list FW: Job opportunities at Global Foundries per A. Strachan/M. Lundstrom

[Stacey, Lisa A]

MSE Faculty and Post-Docs,

I am forwarding job opportunities with Global Foundries per Ale Strachan, and Mark Lundstrom requests.  I have also shared with Inna, Rosemary, and Karen to please share with their specific degree level students, per job requirements.

Please feel free to share with your post-docs and students as you deem appropriate.

Thank you,

Lisa Stacey
Lead Administrative Assistant
School of Materials Engineering
Neil Armstrong Hall of Engineering
o: 765-494-4095   f: 765-494-1204
[3749DD84]<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Furldefense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps-3A__www.purdue.edu_-3Futm-5Fsource-3Dsignature-26utm-5Fmedium-3Demail-26utm-5Fcampaign-3Dpurdue%26d%3DDwMFAg%26c%3Dl45AxH-kUV29SRQusp9vYR0n1GycN4_2jInuKy6zbqQ%26r%3DcYZgnbkB39R9SYPCvL_MkXuih1H-IjjKyRBtQtQ6ib8%26m%3DH5ec4nXIY6Mt-FgrmXhcB1ClcZZRWvtSm3BzPca31UE%26s%3Dra1N_tE4A3L7IxFqllrao41XR8k0ynZZYRxh3KMpTwY%26e%3D&data=05%7C02%7Cmsepostdoc-list%40ecn.purdue.edu%7Caba76f2b8b7044a5620408dd3191f942%7C4130bd397c53419cb1e58758d6d63f21%7C0%7C0%7C638721225201643378%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=nY2xurUds%2BhrwJmjFIp56u9NVEPtsbfWd7DcDwR2bqI%3D&reserved=0>
________________________________

Physical & Materials Analytical Lab Engineer (2025 Masters or PhD New College Graduate)
·                  Link to apply: Careers<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fglobalfoundries.wd1.myworkdayjobs.com%2FExternal%2Fjob%2FUSA---New-York---Malta%2FPhysical---Materials-Analytical-Lab-Engineer--2025-New-College-Graduate-_JR-2403136&data=05%7C02%7Cmsepostdoc-list%40ecn.purdue.edu%7Caba76f2b8b7044a5620408dd3191f942%7C4130bd397c53419cb1e58758d6d63f21%7C0%7C0%7C638721225201676631%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=i7%2BknwIDoMUL0fParTtcfEZYxteW9HrEkgJu6Dz1VmY%3D&reserved=0>
·                  Major: Materials Science and Engineering
·                  Education level: Masters/PhD
·                  Location: Malta, NY
·                  Experience: Lab experience and working with SEM, FIB, TEM sample preparation, TEM imaging, SIMS
Sr Engineer Application Engineering (2025 New College Graduate)
·                  Link to apply: Careers<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fglobalfoundries.wd1.myworkdayjobs.com%2FExternal%2Fjob%2FUSA---Texas---Austin%2FUS-Sr-Engineer-Application-Engineering--2025-New-College-Graduate-_JR-2403220&data=05%7C02%7Cmsepostdoc-list%40ecn.purdue.edu%7Caba76f2b8b7044a5620408dd3191f942%7C4130bd397c53419cb1e58758d6d63f21%7C0%7C0%7C638721225201693432%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=6pzBWdFqet0XIKIXaeBmAVfiKI%2Ff4cvEWIP3TWOJuMo%3D&reserved=0>

  *   Major: Electrical Engineering
·                  Education level: Masters (preferred) or PhD
·                  Location: Austin, TX (preferred) or Santa Clara, CA
·                  Experience: Digital design synthesis (place & route, standard cells, etc). Analog, mixed-signal circuit design using EDA tools (layout, simulation, verification (verilog)). Place & Route, DRC/LVS verification, modeling and knowledge of Semiconductor devices
Field Application Engineer (2025 New College Graduate)
·                  Link to apply: Careers<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fglobalfoundries.wd1.myworkdayjobs.com%2FExternal%2Fjob%2FUSA---California---Santa-Clara%2FUS-Field-Application-Engineer--2025-New-College-Graduate-_JR-2403086&data=05%7C02%7Cmsepostdoc-list%40ecn.purdue.edu%7Caba76f2b8b7044a5620408dd3191f942%7C4130bd397c53419cb1e58758d6d63f21%7C0%7C0%7C638721225201708103%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=SzKyDvDqWLihmmpcIeluZgMZjLTTByngLRlguzVL8Ec%3D&reserved=0>

  *   Major: Electrical Engineering
·                  Education level: Masters (preferred) or PhD
·                  Location: Austin, TX (preferred) or Santa Clara, CA
·                  Experience: Digital design synthesis (place & route, standard cells, etc). Analog, mixed-signal circuit design using EDA tools (layout, simulation, verification (verilog)). Place & Route, DRC/LVS verification, modeling and knowledge of Semiconductor devices
Customer Engineering (2025 New College Graduate)
·                  Link to apply: Careers<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fglobalfoundries.wd1.myworkdayjobs.com%2FExternal%2Fjob%2FUSA---New-York---Malta%2FUS-Customer-Engineering--2025-New-College-Graduate-_JR-2403117&data=05%7C02%7Cmsepostdoc-list%40ecn.purdue.edu%7Caba76f2b8b7044a5620408dd3191f942%7C4130bd397c53419cb1e58758d6d63f21%7C0%7C0%7C638721225201722164%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=hNPDSKcCCU7s7%2BTpl6THU%2FCayZM36AVi%2FEsarDwpKTc%3D&reserved=0>

  *   Major: Electrical Engineering or Semi related major
·                  Education level: Masters (preferred) or Bachelors
·                  Location: Malta, NY
·                  Experience: Any semi related internship experience preferred or working with customers during internship.


Sumeet Kumar Gupta, Ph.D.
Elmore Associate Professor
Elmore Family School of Electrical and Computer Engineering
Purdue University
465 Northwestern Ave
West Lafayette IN 47906
Phone: 765 494 3484 (o)
Email: guptask at purdue.edu<mailto:guptask at purdue.edu>
Website: https://engineering.purdue.edu/ICDL
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