[BNC-all] REMINDER Seminar, November 3, BRK 1001; 2-3:30 - Jaijeet Roychowdhury

[Anthrop, Heather L]

Jaijeet Roychowdhury
Electrical Engineering and Computer Science
University of California, Berkeley

Thursday, Nov. 3 from 2:00 – 3:30 PM Birck 1001

The Berkeley Model and Algorithm Prototyping Platform
Tianshi Wang, Karthik Aadithya*, Gokcen Mahmutoglu, Archit Gupta and
Jaijeet Roychowdhury. UC Berkeley and *Sandia National Laboratory

Berkeley MAPP is a MATLAB-based framework for quickly prototyping device compact models and simulation algorithms.  MAPP’s internal code structuring, which differs markedly from that of Berkeley SPICE and related simulators, allows users to add new devices with only minimal knowledge of simulation algorithms, and vice-versa.  We provide an overview of MAPP’s modeling format ModSpec, its Verilog-A translator VAPP and its simulation capabilities.  We will also briefly mention recent additions to MAPP, including memristor/RRAM models, BJT snapback models, table-based modelling capabilities, etc.  MAPP is available as open source under the GNU Public License.

After a short break, the second seminar will begin at 2:45 PM

PHLOGON: Phase-based Logic using Oscillatory Nanosystems
Tianshi Wang and Jaijeet Roychowdhury, UC Berkeley

In the 1950s, Goto and von Neumann showed how Boolean computation could be performed by encoding logic states in the phase of oscillatory signals. However, the AC-pumped circuit realizations they proposed were not well suited for scaling and miniaturization, hence their scheme could not compete with the level-based logic now ubiquitous in IC implementations. We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation becomes possible using a wide variety of natural and engineered oscillators (including CMOS realizations) as substrates; moreover, it features attractive energy and noise immunity properties, and is capable of running at near-THz speeds. With Moore’s Law facing fundamental barriers is an important concern, these results provide motivation for re-examining phase based logic as an alternative for the post-CMOS era.

Bio: Jaijeet Roychowdhury is a Professor in the EECS Department at the University of California at Berkeley.  Prior to Berkeley, he spent 8 years in Bell Labs and another 8 years at the University of Minnesota. His current research interests encompass novel computational architectures and paradigms, analog and mixed-signal verification, multi-domain device modelling and open-source infrastructures for reproducible research.




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